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| author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2019-07-05 11:56:52 +0200 |
|---|---|---|
| committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2019-07-08 13:39:09 +0200 |
| commit | 4e00aca3ba0b54d496c224888b468207c601463c (patch) | |
| tree | e18dff475936a6245184965c0ec605e923f19c76 /crypto/lrw.c | |
| parent | PCI: mobiveil: Add upper 32-bit CPU base address setup in outbound window (diff) | |
| download | linux-4e00aca3ba0b54d496c224888b468207c601463c.tar.xz linux-4e00aca3ba0b54d496c224888b468207c601463c.zip | |
PCI: mobiveil: Add upper 32-bit PCI base address setup in inbound window
Current code erroneously sets-up the lower 32-bit PCI base address in
the inbound window, which results in inbound transactions not working in
64-bit platforms.
Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver")
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
Diffstat (limited to 'crypto/lrw.c')
0 files changed, 0 insertions, 0 deletions