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| author | Peng Fan <peng.fan@nxp.com> | 2022-08-30 05:31:32 +0200 |
|---|---|---|
| committer | Abel Vesa <abel.vesa@linaro.org> | 2022-09-19 12:06:45 +0200 |
| commit | 4a3de5aa7743d1def6fba783c072e41df6b851c5 (patch) | |
| tree | 78548dbc68c00732f2e4fd9b8858891a78ccc3e8 /drivers/clk/imx/clk.h | |
| parent | dt-bindings: clock: imx93-clock: add more MU/SAI clocks (diff) | |
| download | linux-4a3de5aa7743d1def6fba783c072e41df6b851c5.tar.xz linux-4a3de5aa7743d1def6fba783c072e41df6b851c5.zip | |
clk: imx: clk-composite-93: check slice busy
i.MX93 CCM ROOT STAT register has a SLICE_BUSY bit:
indication for clock generation logic is applying new setting.
0b - Clock generation logic is not busy.
1b - Clock generation logic is applying new setting.
So when set parent/rate/gate, need check this bit.
Introduce specific ops to do the work.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20220830033137.4149542-4-peng.fan@oss.nxp.com
Diffstat (limited to 'drivers/clk/imx/clk.h')
0 files changed, 0 insertions, 0 deletions