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author | Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> | 2020-07-07 18:18:10 +0200 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2020-07-13 10:36:33 +0200 |
commit | c8a53fa1d211936ddcabf82ff991c18672b3d63a (patch) | |
tree | 251cd0717ae38ae29504cb85f58b7e438290c391 /drivers/clk/renesas/renesas-cpg-mssr.h | |
parent | dt-bindings: clock: renesas,cpg-mssr: Document r8a774e1 (diff) | |
download | linux-c8a53fa1d211936ddcabf82ff991c18672b3d63a.tar.xz linux-c8a53fa1d211936ddcabf82ff991c18672b3d63a.zip |
clk: renesas: cpg-mssr: Add r8a774e1 support
Add support for the RZ/G2H (R8A774E1) SoC to the Renesas Clock
Pulse Generator / Module Standby and Software Reset driver.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594138692-16816-11-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
[geert: Mark RWDT critical, cfr. commit f23f1101ad0ef1ac ("clk: renesas: rcar-gen3: Mark RWDT clocks as critical")]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk/renesas/renesas-cpg-mssr.h')
-rw-r--r-- | drivers/clk/renesas/renesas-cpg-mssr.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/renesas/renesas-cpg-mssr.h b/drivers/clk/renesas/renesas-cpg-mssr.h index 55a18ef0efaf..1cc569484250 100644 --- a/drivers/clk/renesas/renesas-cpg-mssr.h +++ b/drivers/clk/renesas/renesas-cpg-mssr.h @@ -162,6 +162,7 @@ extern const struct cpg_mssr_info r8a77470_cpg_mssr_info; extern const struct cpg_mssr_info r8a774a1_cpg_mssr_info; extern const struct cpg_mssr_info r8a774b1_cpg_mssr_info; extern const struct cpg_mssr_info r8a774c0_cpg_mssr_info; +extern const struct cpg_mssr_info r8a774e1_cpg_mssr_info; extern const struct cpg_mssr_info r8a7790_cpg_mssr_info; extern const struct cpg_mssr_info r8a7791_cpg_mssr_info; extern const struct cpg_mssr_info r8a7792_cpg_mssr_info; |