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author | Peter De Schrijver <pdeschrijver@nvidia.com> | 2017-02-28 15:37:17 +0100 |
---|---|---|
committer | Thierry Reding <treding@nvidia.com> | 2017-03-20 14:06:23 +0100 |
commit | bfa34832df1fffb79c1719d4016e9cacf0f83b22 (patch) | |
tree | 167619686170ed36db83cdfad93ce3b815753877 /drivers/clk/tegra/clk-tegra30.c | |
parent | clk: tegra: Fix type for m field (diff) | |
download | linux-bfa34832df1fffb79c1719d4016e9cacf0f83b22.tar.xz linux-bfa34832df1fffb79c1719d4016e9cacf0f83b22.zip |
clk: tegra: Add CEC clock
This clock is used to clock the HDMI CEC interface.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra/clk-tegra30.c')
-rw-r--r-- | drivers/clk/tegra/clk-tegra30.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c index 8e2db5ead8da..a2d163f759b4 100644 --- a/drivers/clk/tegra/clk-tegra30.c +++ b/drivers/clk/tegra/clk-tegra30.c @@ -817,6 +817,7 @@ static struct tegra_clk tegra30_clks[tegra_clk_max] __initdata = { [tegra_clk_pll_p_out4] = { .dt_id = TEGRA30_CLK_PLL_P_OUT4, .present = true }, [tegra_clk_pll_a] = { .dt_id = TEGRA30_CLK_PLL_A, .present = true }, [tegra_clk_pll_a_out0] = { .dt_id = TEGRA30_CLK_PLL_A_OUT0, .present = true }, + [tegra_clk_cec] = { .dt_id = TEGRA30_CLK_CEC, .present = true }, }; static const char *pll_e_parents[] = { "pll_ref", "pll_p" }; |