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authorAbel Vesa <abel.vesa@nxp.com>2020-10-15 11:25:44 +0200
committerStephen Boyd <sboyd@kernel.org>2020-10-20 18:29:23 +0200
commitb159c63d82ff8ffddc6c6f0eb881b113b36ecad7 (patch)
tree90cb48370b9582e4eaf3e92458610b1cde07e50d /drivers/clk/ti/clk-7xx.c
parentMerge tag 'clk-imx-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sha... (diff)
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clk: imx8mq: Fix usdhc parents order
According to the latest RM (see Table 5-1. Clock Root Table), both usdhc root clocks have the parent order as follows: 000 - 25M_REF_CLK 001 - SYSTEM_PLL1_DIV2 010 - SYSTEM_PLL1_CLK 011 - SYSTEM_PLL2_DIV2 100 - SYSTEM_PLL3_CLK 101 - SYSTEM_PLL1_DIV3 110 - AUDIO_PLL2_CLK 111 - SYSTEM_PLL1_DIV8 So the audio_pll2_out and sys3_pll_out have to be swapped. Fixes: b80522040cd3 ("clk: imx: Add clock driver for i.MX8MQ CCM") Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Reported-by: Cosmin Stefan Stoica <cosmin.stoica@nxp.com> Link: https://lore.kernel.org/r/1602753944-30757-1-git-send-email-abel.vesa@nxp.com Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/ti/clk-7xx.c')
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