diff options
author | Tao Zhou <tao.zhou1@amd.com> | 2019-07-24 09:13:27 +0200 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2019-07-31 21:49:40 +0200 |
commit | 4fa1c6a679bb0d0bb92cf5bf9b7049ef98552848 (patch) | |
tree | 03a82d604ac491a5e0c6993b40f33fa31257973b /drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | |
parent | drm/amdgpu: add ras error count after each query (v2) (diff) | |
download | linux-4fa1c6a679bb0d0bb92cf5bf9b7049ef98552848.tar.xz linux-4fa1c6a679bb0d0bb92cf5bf9b7049ef98552848.zip |
drm/amdgpu: add RREG64/WREG64(_PCIE) operations
add 64 bits register access functions
v2: implement 64 bit functions in low level
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Dennis Li <dennis.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_device.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 73 |
1 files changed, 73 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index 2081649f49ca..6940600ebf0e 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -262,6 +262,43 @@ void amdgpu_mm_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v, } /** + * amdgpu_mm_rreg64 - read a 64 bit memory mapped IO register + * + * @adev: amdgpu_device pointer + * @reg: dword aligned register offset + * + * Returns the 64 bit value from the offset specified. + */ +uint64_t amdgpu_mm_rreg64(struct amdgpu_device *adev, uint32_t reg) +{ + uint64_t ret; + + if ((reg * 4) < adev->rmmio_size) + ret = readq(((void __iomem *)adev->rmmio) + (reg * 4)); + else + BUG(); + + return ret; +} + +/** + * amdgpu_mm_wreg64 - write to a 64 bit memory mapped IO register + * + * @adev: amdgpu_device pointer + * @reg: dword aligned register offset + * @v: 64 bit value to write to the register + * + * Writes the value specified to the offset specified. + */ +void amdgpu_mm_wreg64(struct amdgpu_device *adev, uint32_t reg, uint64_t v) +{ + if ((reg * 4) < adev->rmmio_size) + writeq(v, ((void __iomem *)adev->rmmio) + (reg * 4)); + else + BUG(); +} + +/** * amdgpu_io_rreg - read an IO register * * @adev: amdgpu_device pointer @@ -417,6 +454,40 @@ static void amdgpu_invalid_wreg(struct amdgpu_device *adev, uint32_t reg, uint32 } /** + * amdgpu_invalid_rreg64 - dummy 64 bit reg read function + * + * @adev: amdgpu device pointer + * @reg: offset of register + * + * Dummy register read function. Used for register blocks + * that certain asics don't have (all asics). + * Returns the value in the register. + */ +static uint64_t amdgpu_invalid_rreg64(struct amdgpu_device *adev, uint32_t reg) +{ + DRM_ERROR("Invalid callback to read 64 bit register 0x%04X\n", reg); + BUG(); + return 0; +} + +/** + * amdgpu_invalid_wreg64 - dummy reg write function + * + * @adev: amdgpu device pointer + * @reg: offset of register + * @v: value to write to the register + * + * Dummy register read function. Used for register blocks + * that certain asics don't have (all asics). + */ +static void amdgpu_invalid_wreg64(struct amdgpu_device *adev, uint32_t reg, uint64_t v) +{ + DRM_ERROR("Invalid callback to write 64 bit register 0x%04X with 0x%08llX\n", + reg, v); + BUG(); +} + +/** * amdgpu_block_invalid_rreg - dummy reg read function * * @adev: amdgpu device pointer @@ -2537,6 +2608,8 @@ int amdgpu_device_init(struct amdgpu_device *adev, adev->pcie_wreg = &amdgpu_invalid_wreg; adev->pciep_rreg = &amdgpu_invalid_rreg; adev->pciep_wreg = &amdgpu_invalid_wreg; + adev->pcie_rreg64 = &amdgpu_invalid_rreg64; + adev->pcie_wreg64 = &amdgpu_invalid_wreg64; adev->uvd_ctx_rreg = &amdgpu_invalid_rreg; adev->uvd_ctx_wreg = &amdgpu_invalid_wreg; adev->didt_rreg = &amdgpu_invalid_rreg; |