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| author | Shaoyun Liu <Shaoyun.Liu@amd.com> | 2017-11-28 23:01:21 +0100 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2017-12-08 17:18:51 +0100 |
| commit | 946a4d5b301028621791e6c8b53f64c426dea1a5 (patch) | |
| tree | 636bc2d2df27c039b144c5429a7a6e49232f892e /drivers/gpu/drm/amd/amdgpu/soc15_common.h | |
| parent | drm/amdgpu: Use dynamic IP offset for register access on SOC15 (diff) | |
| download | linux-946a4d5b301028621791e6c8b53f64c426dea1a5.tar.xz linux-946a4d5b301028621791e6c8b53f64c426dea1a5.zip | |
drm/amdgpu: Avoid use SOC15_REG_OFFSET in static const array
Handle dynamic offsets correctly in static arrays.
Acked-by: Christian Konig <christian.koenig@amd.com>
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/soc15_common.h')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/soc15_common.h | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15_common.h b/drivers/gpu/drm/amd/amdgpu/soc15_common.h index 62a6e218e748..e2207c5745f0 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc15_common.h +++ b/drivers/gpu/drm/amd/amdgpu/soc15_common.h @@ -25,8 +25,6 @@ #define __SOC15_COMMON_H__ struct nbio_hdp_flush_reg { - u32 hdp_flush_req_offset; - u32 hdp_flush_done_offset; u32 ref_and_mask_cp0; u32 ref_and_mask_cp1; u32 ref_and_mask_cp2; @@ -41,10 +39,6 @@ struct nbio_hdp_flush_reg { u32 ref_and_mask_sdma1; }; -struct nbio_pcie_index_data { - u32 index_offset; - u32 data_offset; -}; /* Register Access Macros */ #define SOC15_REG_OFFSET(ip, inst, reg) (0 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG0 + reg : \ |