diff options
| author | Charlene Liu <charlene.liu@amd.com> | 2019-05-28 19:52:09 +0200 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-06-22 16:34:14 +0200 |
| commit | a6465d1f3b8f863bd4ffd4048d10de3558b378d5 (patch) | |
| tree | 1099fe182e60861cf6a42f8668ca0ac35cffaa19 /drivers/gpu/drm/amd/display/dc/clk_mgr | |
| parent | drm/amd/display: add p010 and ayuv plane caps (diff) | |
| download | linux-a6465d1f3b8f863bd4ffd4048d10de3558b378d5.tar.xz linux-a6465d1f3b8f863bd4ffd4048d10de3558b378d5.zip | |
drm/amd/display: dcn2 use fixed clocks.
[Description]
dcn2 use fixed clocks and not program DPP CLK or Disp_CLK.
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/clk_mgr')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c index 6f01830fc020..445bbc3bea0e 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c @@ -225,19 +225,19 @@ void dcn2_update_clocks(struct clk_mgr *clk_mgr_base, update_dispclk = true; } - - if (dpp_clock_lowered) { - // if clock is being lowered, increase DTO before lowering refclk - dcn20_update_clocks_update_dpp_dto(clk_mgr, context); - dcn20_update_clocks_update_dentist(clk_mgr); - } else { - // if clock is being raised, increase refclk before lowering DTO - if (update_dppclk || update_dispclk) - dcn20_update_clocks_update_dentist(clk_mgr); - if (update_dppclk) + if (dc->config.forced_clocks == false) { + if (dpp_clock_lowered) { + // if clock is being lowered, increase DTO before lowering refclk dcn20_update_clocks_update_dpp_dto(clk_mgr, context); + dcn20_update_clocks_update_dentist(clk_mgr); + } else { + // if clock is being raised, increase refclk before lowering DTO + if (update_dppclk || update_dispclk) + dcn20_update_clocks_update_dentist(clk_mgr); + if (update_dppclk) + dcn20_update_clocks_update_dpp_dto(clk_mgr, context); + } } - if (update_dispclk && dmcu && dmcu->funcs->is_dmcu_initialized(dmcu)) { /*update dmcu for wait_loop count*/ |