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authorRadhakrishna Sripada <radhakrishna.sripada@intel.com>2024-04-30 19:28:35 +0200
committerRadhakrishna Sripada <radhakrishna.sripada@intel.com>2024-05-03 21:34:04 +0200
commit68cd73716216f04ef12433a6486821a291736ce3 (patch)
tree933d037060c0f6534aa683851975b5a4a050438a /drivers/gpu/drm/i915/display/intel_display.c
parentdrm/i915/xe2hpd: Initial cdclk table (diff)
downloadlinux-68cd73716216f04ef12433a6486821a291736ce3.tar.xz
linux-68cd73716216f04ef12433a6486821a291736ce3.zip
drm/i915/bmg: Extend DG2 tc check to future
Discrete cards use the Port numbers TC1-4 for the offsets. The regular flow for type-c subsystem port initialization can be skipped. This check is present in DG2. Extend this to future discrete products. Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240430172850.1881525-5-radhakrishna.sripada@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/display/intel_display.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index ee862f5d0ff4..c62ef56ca0dc 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1894,11 +1894,10 @@ bool intel_phy_is_combo(struct drm_i915_private *dev_priv, enum phy phy)
bool intel_phy_is_tc(struct drm_i915_private *dev_priv, enum phy phy)
{
/*
- * DG2's "TC1", although TC-capable output, doesn't share the same flow
- * as other platforms on the display engine side and rather rely on the
- * SNPS PHY, that is programmed separately
+ * Discrete GPU phy's are not attached to FIA's to support TC
+ * subsystem Legacy or non-legacy, and only support native DP/HDMI
*/
- if (IS_DG2(dev_priv))
+ if (IS_DGFX(dev_priv))
return false;
if (DISPLAY_VER(dev_priv) >= 13)