diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2023-06-06 21:14:52 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2023-09-07 14:44:41 +0200 |
| commit | 231b1d6c9ab6ff23f7a1826835946dd2b0f57156 (patch) | |
| tree | 211d563e46c3d7d735c5144a79f7303b1a3beeb6 /drivers/gpu/drm/i915/display/intel_dsb.c | |
| parent | drm/i915/dsb: Avoid corrupting the first register write (diff) | |
| download | linux-231b1d6c9ab6ff23f7a1826835946dd2b0f57156.tar.xz linux-231b1d6c9ab6ff23f7a1826835946dd2b0f57156.zip | |
drm/i915/dsb: Don't use indexed writes when byte enables are not all set
The indexed write instruction doesn't support byte-enables, so
if the non-indexed write used those we must not convert it to
an indexed write.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230606191504.18099-8-ville.syrjala@linux.intel.com
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dsb.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dsb.c | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c index 3de0d572c511..9a507b9ad82c 100644 --- a/drivers/gpu/drm/i915/display/intel_dsb.c +++ b/drivers/gpu/drm/i915/display/intel_dsb.c @@ -145,7 +145,7 @@ static bool intel_dsb_prev_ins_is_write(struct intel_dsb *dsb, if (dsb->free_pos == 0) return false; - prev_opcode = buf[dsb->ins_start_offset + 1] >> DSB_OPCODE_SHIFT; + prev_opcode = buf[dsb->ins_start_offset + 1] & ~DSB_REG_VALUE_MASK; prev_reg = buf[dsb->ins_start_offset + 1] & DSB_REG_VALUE_MASK; return prev_opcode == opcode && prev_reg == i915_mmio_reg_offset(reg); @@ -153,12 +153,18 @@ static bool intel_dsb_prev_ins_is_write(struct intel_dsb *dsb, static bool intel_dsb_prev_ins_is_mmio_write(struct intel_dsb *dsb, i915_reg_t reg) { - return intel_dsb_prev_ins_is_write(dsb, DSB_OPCODE_MMIO_WRITE, reg); + /* only full byte-enables can be converted to indexed writes */ + return intel_dsb_prev_ins_is_write(dsb, + DSB_OPCODE_MMIO_WRITE << DSB_OPCODE_SHIFT | + DSB_BYTE_EN << DSB_BYTE_EN_SHIFT, + reg); } static bool intel_dsb_prev_ins_is_indexed_write(struct intel_dsb *dsb, i915_reg_t reg) { - return intel_dsb_prev_ins_is_write(dsb, DSB_OPCODE_INDEXED_WRITE, reg); + return intel_dsb_prev_ins_is_write(dsb, + DSB_OPCODE_INDEXED_WRITE << DSB_OPCODE_SHIFT, + reg); } /** |