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authorLucas De Marchi <lucas.demarchi@intel.com>2019-11-16 02:15:39 +0100
committerLucas De Marchi <lucas.demarchi@intel.com>2019-11-18 22:27:09 +0100
commitac4eead3796579bdadd12e2fa99c4ddc920eda30 (patch)
treede35c9ccbcf48b1aeaeb9c9536c99dd7ac3e3ce1 /drivers/gpu/drm/i915/display/intel_dsb.h
parentdrm/i915/mst: Check uapi enable not intel one during mst atomic check (diff)
downloadlinux-ac4eead3796579bdadd12e2fa99c4ddc920eda30.tar.xz
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drm/i915/dsb: remove atomic operations
The current dsb API is not really prepared to handle multithread access. I was debugging an issue that ended up fixed by commit a096883dda2c ("drm/i915/dsb: Remove PIN_MAPPABLE from the DSB object VMA") and was puzzled how these atomic operations were guaranteeing atomicity. if (atomic_add_return(1, &dsb->refcount) != 1) return dsb; Thread A could still be initializing dsb struct (and even fail in the middle) while thread B would take a reference and use it (even derefencing a NULL cmd_buf). I don't think the atomic operations here will help much if this were to support multithreaded scenario in future, so just remove them to avoid confusion. v2: Use refcount++ != 0 instead of ++refcount != 1 (from Ville) Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191111205024.22853-2-lucas.demarchi@intel.com Link: https://patchwork.freedesktop.org/patch/msgid/20191116011539.18230-1-lucas.demarchi@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dsb.h')
-rw-r--r--drivers/gpu/drm/i915/display/intel_dsb.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.h b/drivers/gpu/drm/i915/display/intel_dsb.h
index 6f95c8e909e6..395ef9ce558e 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.h
+++ b/drivers/gpu/drm/i915/display/intel_dsb.h
@@ -22,7 +22,7 @@ enum dsb_id {
};
struct intel_dsb {
- atomic_t refcount;
+ long refcount;
enum dsb_id id;
u32 *cmd_buf;
struct i915_vma *vma;