summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/display/intel_fbc.c
diff options
context:
space:
mode:
authorVinod Govindapillai <vinod.govindapillai@intel.com>2023-09-22 15:30:02 +0200
committerVille Syrjälä <ville.syrjala@linux.intel.com>2023-10-03 14:52:59 +0200
commitde1ee4e4cd32ce044276ba809c985344cecdf7ac (patch)
treef9006aea2304b70e951e57b6159bb875f13a4538 /drivers/gpu/drm/i915/display/intel_fbc.c
parentdrm/i915: Add missing GSCCS documentation (diff)
downloadlinux-de1ee4e4cd32ce044276ba809c985344cecdf7ac.tar.xz
linux-de1ee4e4cd32ce044276ba809c985344cecdf7ac.zip
drm/i915/lnl: possibility to enable FBC on first three planes
In LNL onwards, FBC can be associated to the first three planes. FBC will be enabled on planes first come first served basis until the userspace can select one of these FBC capable planes explicitly. v2: - avoid fbc->state.plane check in intel_fbc_check_plane (Ville) - simplify plane binding register writes (Matt) - Update the subject to reflect that fbc can be enabled only in the first three planes (Matt) v3: - use icl_is_hdr_plane(), use wrapper macro for plane binding register access, comments update and patch split (Ville) v4: - update to the plane binding register access macro Bspec: 69560 Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230922133003.150578-2-vinod.govindapillai@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_fbc.c')
-rw-r--r--drivers/gpu/drm/i915/display/intel_fbc.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 1cb9eec29640..0f1dd8729bf1 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -593,6 +593,9 @@ static u32 ivb_dpfc_ctl(struct intel_fbc *fbc)
if (IS_IVYBRIDGE(i915))
dpfc_ctl |= DPFC_CTL_PLANE_IVB(fbc_state->plane->i9xx_plane);
+ if (DISPLAY_VER(i915) >= 20)
+ dpfc_ctl |= DPFC_CTL_PLANE_BINDING(fbc_state->plane->id);
+
if (fbc_state->fence_id >= 0)
dpfc_ctl |= DPFC_CTL_FENCE_EN_IVB;