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author | Vinay Belgaumkar <vinay.belgaumkar@intel.com> | 2023-03-23 23:58:52 +0100 |
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committer | Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> | 2023-03-24 16:43:32 +0100 |
commit | 3735040978a43c25a19aa8015ab1a50dffe48f79 (patch) | |
tree | bf73c1b3a816a0f4b2cd2be8f533198a369c4753 /drivers/gpu/drm/i915/gt/intel_rc6.h | |
parent | drm/i915/perf: Drop wakeref on GuC RC error (diff) | |
download | linux-3735040978a43c25a19aa8015ab1a50dffe48f79.tar.xz linux-3735040978a43c25a19aa8015ab1a50dffe48f79.zip |
drm/i915/mtl: Synchronize i915/BIOS on C6 enabling
If BIOS enables/disables C6, i915 should do the same. Also, retain
this value across driver reloads. This is needed only for MTL as
of now due to an existing bug in OA which needs C6 disabled for
it to function. BIOS behavior is also different across platforms
in terms of how C6 is enabled.
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323225901.3743681-3-umesh.nerlige.ramappa@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_rc6.h')
-rw-r--r-- | drivers/gpu/drm/i915/gt/intel_rc6.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.h b/drivers/gpu/drm/i915/gt/intel_rc6.h index 456fa668a276..e137c2c397c2 100644 --- a/drivers/gpu/drm/i915/gt/intel_rc6.h +++ b/drivers/gpu/drm/i915/gt/intel_rc6.h @@ -27,4 +27,6 @@ u64 intel_rc6_residency_us(struct intel_rc6 *rc6, enum intel_rc6_res_type id); void intel_rc6_print_residency(struct seq_file *m, const char *title, enum intel_rc6_res_type id); +bool intel_check_bios_c6_setup(struct intel_rc6 *rc6); + #endif /* INTEL_RC6_H */ |