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authorLionel Landwerlin <lionel.g.landwerlin@intel.com>2019-06-02 00:58:45 +0200
committerLionel Landwerlin <lionel.g.landwerlin@intel.com>2019-06-10 10:48:24 +0200
commitbf210f6c9e6fd8dc0d154ad18f741f20e64a3fce (patch)
tree1e38e98c1d0f8fca686db81592a74ba9b8e66623 /drivers/gpu/drm/i915/i915_drv.h
parentdrm/i915: Move i915_check_and_clear_faults to intel_reset.c (diff)
downloadlinux-bf210f6c9e6fd8dc0d154ad18f741f20e64a3fce.tar.xz
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drm/i915/perf: fix whitelist on Gen10+
Gen10 added an additional NOA_WRITE register (high bits) and we forgot to whitelist it for userspace. Fixes: 95690a02fb5d96 ("drm/i915/perf: enable perf support on CNL") Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190601225845.12600-1-lionel.g.landwerlin@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
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