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author | Uma Shankar <uma.shankar@intel.com> | 2019-02-20 20:05:19 +0100 |
---|---|---|
committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2019-02-21 14:41:03 +0100 |
commit | 2a3902bd5c14a4946739c9da14071f5aa6e85549 (patch) | |
tree | 8dcf2f1deca0fe462bbc126b501f77f0a58c9176 /drivers/gpu/drm/i915/intel_display.c | |
parent | drm/i915/hdcp: Silence compiler critics (diff) | |
download | linux-2a3902bd5c14a4946739c9da14071f5aa6e85549.tar.xz linux-2a3902bd5c14a4946739c9da14071f5aa6e85549.zip |
drm/i915/icl: Drop redundant gamma mode mask
gamma mode mask was not considering the 30th and 31st bits.
Due to this state readout was masking these bits, causing a
mismatch and false warning, even though the registers were
updated correctly. Dropped the gamma mode mask as it is
redundant and ideally entire register content should be
matching. This resolves the state mismatch warnings.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1550689519-6977-1-git-send-email-uma.shankar@intel.com
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109624
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 0ca09d1341f3..b1d63c32ca94 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -9897,8 +9897,7 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc, intel_get_pipe_src_size(crtc, pipe_config); intel_get_crtc_ycbcr_config(crtc, pipe_config); - pipe_config->gamma_mode = - I915_READ(GAMMA_MODE(crtc->pipe)) & GAMMA_MODE_MODE_MASK; + pipe_config->gamma_mode = I915_READ(GAMMA_MODE(crtc->pipe)); if (INTEL_GEN(dev_priv) >= 9) { u32 tmp = I915_READ(SKL_BOTTOM_COLOR(crtc->pipe)); |