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| author | Ben Skeggs <bskeggs@redhat.com> | 2011-04-27 18:34:21 +0200 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2011-05-16 02:50:59 +0200 |
| commit | 52eba8dd5e830a836425e92d002bc51e42d3280e (patch) | |
| tree | 88faa691a4828e7a3ca874e4d8d45a2a6feff23f /drivers/gpu/drm/nouveau/nva3_pm.c | |
| parent | drm/nouveau/pm: translate ramcfg strap through ram restrict table (diff) | |
| download | linux-52eba8dd5e830a836425e92d002bc51e42d3280e.tar.xz linux-52eba8dd5e830a836425e92d002bc51e42d3280e.zip | |
drm/nva3/clk: better pll calculation when no fractional fb div available
The core/mem/shader clocks don't support the fractional feedback divider,
causing our calculated clocks to be off by quite a lot in some cases. To
solve this we will switch to a search-based algorithm when fN is NULL.
For my NVA8 at PL3, this actually generates identical cooefficients to
the binary driver. Hopefully that's a good sign, and that does not
break VPLL calculation for someone..
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nva3_pm.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nva3_pm.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/nouveau/nva3_pm.c b/drivers/gpu/drm/nouveau/nva3_pm.c index bc357c850dbd..e4b2b9e934b2 100644 --- a/drivers/gpu/drm/nouveau/nva3_pm.c +++ b/drivers/gpu/drm/nouveau/nva3_pm.c @@ -104,7 +104,7 @@ nva3_pm_clock_pre(struct drm_device *dev, struct nouveau_pm_level *perflvl, { struct nva3_pm_state *pll; struct pll_lims limits; - int N, fN, M, P, diff; + int N, M, P, diff; int ret, off; ret = get_pll_limits(dev, id, &limits); @@ -136,7 +136,7 @@ nva3_pm_clock_pre(struct drm_device *dev, struct nouveau_pm_level *perflvl, } if (!pll->new_div) { - ret = nv50_calc_pll2(dev, &limits, khz, &N, &fN, &M, &P); + ret = nva3_calc_pll(dev, &limits, khz, &N, NULL, &M, &P); if (ret < 0) return ERR_PTR(ret); |