diff options
| author | Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> | 2018-11-06 19:29:18 +0100 |
|---|---|---|
| committer | Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> | 2018-11-09 20:41:43 +0100 |
| commit | cf303a41d97e3fd5c70c5d8a61a11ce7db7e559f (patch) | |
| tree | ab99e12a4a56b4e602d897c865124d73d74d1e63 /drivers/gpu/drm | |
| parent | drm/i915/psr: Move intel_psr_disable_source() code to intel_psr_disable_locked() (diff) | |
| download | linux-cf303a41d97e3fd5c70c5d8a61a11ce7db7e559f.tar.xz linux-cf303a41d97e3fd5c70c5d8a61a11ce7db7e559f.zip | |
drm/i915: fix subslice mask array size
We have a subslice mask per slice, not per subslice.
MAX_SUBSLICES > MAX_SLICES, so the wrong size didn't cause any issue
apart from using extra memory.
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181106182918.5748-1-daniele.ceraolospurio@intel.com
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_device_info.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h index 86ce1db1b33a..88f97210dc49 100644 --- a/drivers/gpu/drm/i915/intel_device_info.h +++ b/drivers/gpu/drm/i915/intel_device_info.h @@ -124,7 +124,7 @@ enum intel_ppgtt { struct sseu_dev_info { u8 slice_mask; - u8 subslice_mask[GEN_MAX_SUBSLICES]; + u8 subslice_mask[GEN_MAX_SLICES]; u16 eu_total; u8 eu_per_subslice; u8 min_eu_in_pool; |