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author | Pavel Machek <pavel@ucw.cz> | 2017-03-01 12:45:46 +0100 |
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committer | Mauro Carvalho Chehab <mchehab@s-opensource.com> | 2017-08-20 14:16:13 +0200 |
commit | 37a0c6f92cc5edcf47a705ab908d4f9657554396 (patch) | |
tree | 46cef3b11102498f57bc5b848019db0c0a9157f1 /drivers/media/platform/omap3isp/ispreg.h | |
parent | media: omap3isp: Parse CSI1 configuration from the device tree (diff) | |
download | linux-37a0c6f92cc5edcf47a705ab908d4f9657554396.tar.xz linux-37a0c6f92cc5edcf47a705ab908d4f9657554396.zip |
media: omap3isp: Correctly set IO_OUT_SEL and VP_CLK_POL for CCP2 mode
ISP CSI1 module needs all the bits correctly set to work.
Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Signed-off-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> # on Beagleboard-xM + MPT9P031
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Diffstat (limited to 'drivers/media/platform/omap3isp/ispreg.h')
-rw-r--r-- | drivers/media/platform/omap3isp/ispreg.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/media/platform/omap3isp/ispreg.h b/drivers/media/platform/omap3isp/ispreg.h index b5ea8da0b904..d08483919a77 100644 --- a/drivers/media/platform/omap3isp/ispreg.h +++ b/drivers/media/platform/omap3isp/ispreg.h @@ -87,6 +87,8 @@ #define ISPCCP2_CTRL_PHY_SEL_MASK 0x1 #define ISPCCP2_CTRL_PHY_SEL_SHIFT 1 #define ISPCCP2_CTRL_IO_OUT_SEL (1 << 2) +#define ISPCCP2_CTRL_IO_OUT_SEL_MASK 0x1 +#define ISPCCP2_CTRL_IO_OUT_SEL_SHIFT 2 #define ISPCCP2_CTRL_MODE (1 << 4) #define ISPCCP2_CTRL_VP_CLK_FORCE_ON (1 << 9) #define ISPCCP2_CTRL_INV (1 << 10) @@ -94,6 +96,8 @@ #define ISPCCP2_CTRL_INV_SHIFT 10 #define ISPCCP2_CTRL_VP_ONLY_EN (1 << 11) #define ISPCCP2_CTRL_VP_CLK_POL (1 << 12) +#define ISPCCP2_CTRL_VP_CLK_POL_MASK 0x1 +#define ISPCCP2_CTRL_VP_CLK_POL_SHIFT 12 #define ISPCCP2_CTRL_VPCLK_DIV_SHIFT 15 #define ISPCCP2_CTRL_VPCLK_DIV_MASK 0x1ffff /* [31:15] */ #define ISPCCP2_CTRL_VP_OUT_CTRL_SHIFT 8 /* 3430 bits */ |