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authorParthiban Veerasooran <Parthiban.Veerasooran@microchip.com>2024-09-09 10:25:07 +0200
committerJakub Kicinski <kuba@kernel.org>2024-09-12 05:53:44 +0200
commit18a918762fab8248e504edbe03c8df966d9666c9 (patch)
treed59a1cb4fff3a21975cb33f040dcadde3c8e1d12 /drivers/net/ethernet/oa_tc6.c
parentnet: ethernet: oa_tc6: implement internal PHY initialization (diff)
downloadlinux-18a918762fab8248e504edbe03c8df966d9666c9.tar.xz
linux-18a918762fab8248e504edbe03c8df966d9666c9.zip
net: phy: microchip_t1s: add c45 direct access in LAN865x internal PHY
This patch adds c45 registers direct access support in Microchip's LAN865x internal PHY. OPEN Alliance 10BASE-T1x compliance MAC-PHYs will have both C22 and C45 registers space. If the PHY is discovered via C22 bus protocol it assumes it uses C22 protocol and always uses C22 registers indirect access to access C45 registers. This is because, we don't have a clean separation between C22/C45 register space and C22/C45 MDIO bus protocols. Resulting, PHY C45 registers direct access can't be used which can save multiple SPI bus access. To support this feature, set .read_mmd/.write_mmd in the PHY driver to call .read_c45/.write_c45 in the OPEN Alliance framework drivers/net/ethernet/oa_tc6.c Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Parthiban Veerasooran <Parthiban.Veerasooran@microchip.com> Link: https://patch.msgid.link/20240909082514.262942-8-Parthiban.Veerasooran@microchip.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'drivers/net/ethernet/oa_tc6.c')
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