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authorJoonas Lahtinen <joonas.lahtinen@linux.intel.com>2018-03-01 10:14:24 +0100
committerJoonas Lahtinen <joonas.lahtinen@linux.intel.com>2018-03-01 10:14:24 +0100
commitbba73071b6f71be0a101658d7c13866e30b264a6 (patch)
tree2a0ea1fc5fd975f1c2e9e50de5bb3cb2cb3cb5f7 /drivers/pci/dwc/pcie-designware-plat.c
parentdrm/i915/dp: Add HBR3 rate (8.1 Gbps) to dp_rates array (diff)
parentMerge tag 'drm-intel-next-2018-02-21' of git://anongit.freedesktop.org/drm/dr... (diff)
downloadlinux-bba73071b6f71be0a101658d7c13866e30b264a6.tar.xz
linux-bba73071b6f71be0a101658d7c13866e30b264a6.zip
Merge drm-next into drm-intel-next-queued (this time for real)
To pull in the HDCP changes, especially wait_for changes to drm/i915 that Chris wants to build on top of. Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Diffstat (limited to 'drivers/pci/dwc/pcie-designware-plat.c')
-rw-r--r--drivers/pci/dwc/pcie-designware-plat.c5
1 files changed, 1 insertions, 4 deletions
diff --git a/drivers/pci/dwc/pcie-designware-plat.c b/drivers/pci/dwc/pcie-designware-plat.c
index 168e2380f493..ebdf28bcd67d 100644
--- a/drivers/pci/dwc/pcie-designware-plat.c
+++ b/drivers/pci/dwc/pcie-designware-plat.c
@@ -1,13 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* PCIe RC driver for Synopsys DesignWare Core
*
* Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
*
* Authors: Joao Pinto <Joao.Pinto@synopsys.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#include <linux/clk.h>
#include <linux/delay.h>