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authorHans de Goede <hdegoede@redhat.com>2024-11-16 16:45:46 +0100
committerIlpo Järvinen <ilpo.jarvinen@linux.intel.com>2024-11-18 12:53:03 +0100
commitc6a2b4fcec5f2d80b0183fae1117f06127584c28 (patch)
treecf0b20cb9e99306e60245d7fe29d1f025e6d0353 /drivers/platform
parentplatform/x86: panasonic-laptop: Return errno correctly in show callback (diff)
downloadlinux-c6a2b4fcec5f2d80b0183fae1117f06127584c28.tar.xz
linux-c6a2b4fcec5f2d80b0183fae1117f06127584c28.zip
platform/x86: p2sb: Cache correct PCI bar for P2SB on Gemini Lake
Gemini Lake (Goldmont Plus) is an Apollo Lake (Goldmont) derived design and as such has the P2SB at device.function 13.0, rather then at the default 31.1, just like Apollo Lake. At a mapping to P2SB_DEVFN_GOLDMONT to p2sb_cpu_ids[] for Goldmont Plus, so that the correct PCI bar gets cached. This fixes P2SB unhiding not working on these devices, which fixes SPI support for the bootrom SPI controller not working. Fixes: 2841631a0365 ("platform/x86: p2sb: Allow p2sb_bar() calls during PCI device probe") Reviewed-by: Andy Shevchenko <andy@kernel.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20241116154546.85761-1-hdegoede@redhat.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Diffstat (limited to 'drivers/platform')
-rw-r--r--drivers/platform/x86/p2sb.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/platform/x86/p2sb.c b/drivers/platform/x86/p2sb.c
index 31f38309b389..d51eb0db0626 100644
--- a/drivers/platform/x86/p2sb.c
+++ b/drivers/platform/x86/p2sb.c
@@ -25,6 +25,7 @@
static const struct x86_cpu_id p2sb_cpu_ids[] = {
X86_MATCH_VFM(INTEL_ATOM_GOLDMONT, P2SB_DEVFN_GOLDMONT),
+ X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_PLUS, P2SB_DEVFN_GOLDMONT),
{}
};