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| author | Song Xue <quic_songxue@quicinc.com> | 2024-10-10 08:38:40 +0200 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2024-11-04 05:05:38 +0100 |
| commit | 9f85ed1976bc7882a300aedb556148dbbb245b96 (patch) | |
| tree | f36d0d82d6867284cbd08914c7c44689f15b07bb /drivers/soc | |
| parent | dt-bindings: cache: qcom,llcc: Document the QCS615 LLCC (diff) | |
| download | linux-9f85ed1976bc7882a300aedb556148dbbb245b96.tar.xz linux-9f85ed1976bc7882a300aedb556148dbbb245b96.zip | |
soc: qcom: llcc: Add configuration data for QCS615
Add LLCC configuration support for the QCS615 platform.
Signed-off-by: Song Xue <quic_songxue@quicinc.com>
Link: https://lore.kernel.org/r/20241010-add_llcc_support_for_qcs615-v2-2-044432450a75@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'drivers/soc')
| -rw-r--r-- | drivers/soc/qcom/llcc-qcom.c | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c index c0a01904ae4c..227e3112455f 100644 --- a/drivers/soc/qcom/llcc-qcom.c +++ b/drivers/soc/qcom/llcc-qcom.c @@ -2628,6 +2628,45 @@ static const struct llcc_slice_config sm8650_data[] = { }, }; +static const struct llcc_slice_config qcs615_data[] = { + { + .usecase_id = LLCC_CPUSS, + .slice_id = 1, + .max_cap = 128, + .priority = 1, + .bonus_ways = 0xf, + .cache_mode = 0, + .activate_on_init = true, + .write_scid_en = true, + }, { + .usecase_id = LLCC_MDM, + .slice_id = 8, + .max_cap = 256, + .priority = 0, + .fixed_size = true, + .bonus_ways = 0xf, + .cache_mode = 0, + .activate_on_init = true, + }, { + .usecase_id = LLCC_GPUHTW, + .slice_id = 11, + .max_cap = 128, + .priority = 1, + .fixed_size = true, + .bonus_ways = 0xf, + .cache_mode = 0, + .activate_on_init = true, + }, { + .usecase_id = LLCC_GPU, + .slice_id = 12, + .max_cap = 128, + .priority = 1, + .bonus_ways = 0xf, + .cache_mode = 0, + .activate_on_init = true, + }, +}; + static const struct llcc_slice_config qdu1000_data_2ch[] = { { .usecase_id = LLCC_MDMHPGRW, @@ -3049,6 +3088,16 @@ static const u32 llcc_v2_1_reg_offset[] = { [LLCC_COMMON_STATUS0] = 0x0003400c, }; +static const struct qcom_llcc_config qcs615_cfg[] = { + { + .sct_data = qcs615_data, + .size = ARRAY_SIZE(qcs615_data), + .need_llcc_cfg = true, + .reg_offset = llcc_v1_reg_offset, + .edac_reg_offset = &llcc_v1_edac_reg_offset, + }, +}; + static const struct qcom_llcc_config qdu1000_cfg[] = { { .sct_data = qdu1000_data_8ch, @@ -3255,6 +3304,11 @@ static const struct qcom_llcc_config x1e80100_cfg[] = { }, }; +static const struct qcom_sct_config qcs615_cfgs = { + .llcc_config = qcs615_cfg, + .num_config = ARRAY_SIZE(qcs615_cfg), +}; + static const struct qcom_sct_config qdu1000_cfgs = { .llcc_config = qdu1000_cfg, .num_config = ARRAY_SIZE(qdu1000_cfg), @@ -3927,6 +3981,7 @@ err: } static const struct of_device_id qcom_llcc_of_match[] = { + { .compatible = "qcom,qcs615-llcc", .data = &qcs615_cfgs}, { .compatible = "qcom,qdu1000-llcc", .data = &qdu1000_cfgs}, { .compatible = "qcom,sa8775p-llcc", .data = &sa8775p_cfgs }, { .compatible = "qcom,sar1130p-llcc", .data = &sar1130p_cfgs }, |