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| author | Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> | 2024-08-05 13:49:21 +0200 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2024-08-18 08:44:24 +0200 |
| commit | f8c35d61ba01afa76846905c67862cdace7f66b0 (patch) | |
| tree | 5e9b99b439c5852f5a957bdddceb8b3f34756952 /drivers/soundwire/intel.h | |
| parent | soundwire: bus: clean up probe warnings (diff) | |
| download | linux-f8c35d61ba01afa76846905c67862cdace7f66b0.tar.xz linux-f8c35d61ba01afa76846905c67862cdace7f66b0.zip | |
soundwire: cadence: re-check Peripheral status with delayed_work
The SoundWire peripheral enumeration is entirely based on interrupts,
more specifically sticky bits tracking state changes.
This patch adds a defensive programming check on the actual status
reported in PING frames. If for some reason an interrupt was lost or
delayed, the delayed work would detect a peripheral change of status
after the bus starts.
The 100ms defined for the delay is not completely arbitrary, if a
Peripheral didn't join the bus within that delay then probably the
hardware link is broken, and conversely if the detection didn't happen
because of software issues the 100ms is still acceptable in terms of
user experience.
The overhead of the one-shot workqueue is minimal, and the mutual
exclusion ensures that the interrupt and delayed work cannot update
the status concurrently.
Reviewed-by: Liam Girdwood <liam.r.girdwood@intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Link: https://lore.kernel.org/r/20240805114921.88007-1-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/soundwire/intel.h')
| -rw-r--r-- | drivers/soundwire/intel.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/soundwire/intel.h b/drivers/soundwire/intel.h index 68838e843b54..f4235f5991c3 100644 --- a/drivers/soundwire/intel.h +++ b/drivers/soundwire/intel.h @@ -103,6 +103,8 @@ static inline void intel_writew(void __iomem *base, int offset, u16 value) #define INTEL_MASTER_RESET_ITERATIONS 10 +#define SDW_INTEL_DELAYED_ENUMERATION_MS 100 + #define SDW_INTEL_CHECK_OPS(sdw, cb) ((sdw) && (sdw)->link_res && (sdw)->link_res->hw_ops && \ (sdw)->link_res->hw_ops->cb) #define SDW_INTEL_OPS(sdw, cb) ((sdw)->link_res->hw_ops->cb) |