summaryrefslogtreecommitdiffstats
path: root/include/uapi
diff options
context:
space:
mode:
authorSamuel Holland <samuel.holland@sifive.com>2024-10-16 22:27:47 +0200
committerPalmer Dabbelt <palmer@rivosinc.com>2024-10-24 23:12:57 +0200
commit78844482a1c939a972681842f8ee2a8ddb202441 (patch)
tree7a13de4c3919ea5d9fa411dd32665c053ffbe304 /include/uapi
parentriscv: Add support for the tagged address ABI (diff)
downloadlinux-78844482a1c939a972681842f8ee2a8ddb202441.tar.xz
linux-78844482a1c939a972681842f8ee2a8ddb202441.zip
riscv: Allow ptrace control of the tagged address ABI
This allows a tracer to control the ABI of the tracee, as on arm64. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Link: https://lore.kernel.org/r/20241016202814.4061541-7-samuel.holland@sifive.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'include/uapi')
-rw-r--r--include/uapi/linux/elf.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/uapi/linux/elf.h b/include/uapi/linux/elf.h
index b9935988da5c..a920cf8934dc 100644
--- a/include/uapi/linux/elf.h
+++ b/include/uapi/linux/elf.h
@@ -450,6 +450,7 @@ typedef struct elf64_shdr {
#define NT_MIPS_MSA 0x802 /* MIPS SIMD registers */
#define NT_RISCV_CSR 0x900 /* RISC-V Control and Status Registers */
#define NT_RISCV_VECTOR 0x901 /* RISC-V vector registers */
+#define NT_RISCV_TAGGED_ADDR_CTRL 0x902 /* RISC-V tagged address control (prctl()) */
#define NT_LOONGARCH_CPUCFG 0xa00 /* LoongArch CPU config registers */
#define NT_LOONGARCH_CSR 0xa01 /* LoongArch control and status registers */
#define NT_LOONGARCH_LSX 0xa02 /* LoongArch Loongson SIMD Extension registers */