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| author | Peter Zijlstra <peterz@infradead.org> | 2020-11-10 16:37:51 +0100 |
|---|---|---|
| committer | Peter Zijlstra <peterz@infradead.org> | 2021-01-27 17:26:58 +0100 |
| commit | 3daa96d67274653b7c461b30ef9581d68e905fe1 (patch) | |
| tree | bcf57dc2211d2ecff9a9013e455d6bd2f8da8cd5 /kernel/events/core.c | |
| parent | x86/perf: Use static_call for x86_pmu.guest_get_msrs (diff) | |
| download | linux-3daa96d67274653b7c461b30ef9581d68e905fe1.tar.xz linux-3daa96d67274653b7c461b30ef9581d68e905fe1.zip | |
perf/intel: Remove Perfmon-v4 counter_freezing support
Perfmon-v4 counter freezing is fundamentally broken; remove this default
disabled code to make sure nobody uses it.
The feature is called Freeze-on-PMI in the SDM, and if it would do that,
there wouldn't actually be a problem, *however* it does something subtly
different. It globally disables the whole PMU when it raises the PMI,
not when the PMI hits.
This means there's a window between the PMI getting raised and the PMI
actually getting served where we loose events and this violates the
perf counter independence. That is, a counting event should not result
in a different event count when there is a sampling event co-scheduled.
This is known to break existing software (RR).
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Diffstat (limited to 'kernel/events/core.c')
0 files changed, 0 insertions, 0 deletions