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Diffstat (limited to 'drivers/gpu/drm/amd/display/dmub/dmub_srv.h')
-rw-r--r--drivers/gpu/drm/amd/display/dmub/dmub_srv.h26
1 files changed, 25 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dmub/dmub_srv.h b/drivers/gpu/drm/amd/display/dmub/dmub_srv.h
index ac41ae2d261b..863cd9cc93ff 100644
--- a/drivers/gpu/drm/amd/display/dmub/dmub_srv.h
+++ b/drivers/gpu/drm/amd/display/dmub/dmub_srv.h
@@ -265,8 +265,12 @@ struct dmub_srv_hw_funcs {
bool (*is_hw_init)(struct dmub_srv *dmub);
bool (*is_phy_init)(struct dmub_srv *dmub);
+ void (*enable_dmub_boot_options)(struct dmub_srv *dmub);
+
+ void (*skip_dmub_panel_power_sequence)(struct dmub_srv *dmub, bool skip);
+
+ union dmub_fw_boot_status (*get_fw_status)(struct dmub_srv *dmub);
- bool (*is_auto_load_done)(struct dmub_srv *dmub);
void (*set_gpint)(struct dmub_srv *dmub,
union dmub_gpint_data_register reg);
@@ -309,6 +313,7 @@ struct dmub_srv_hw_params {
uint64_t fb_offset;
uint32_t psp_version;
bool load_inst_const;
+ bool skip_panel_power_sequence;
};
/**
@@ -340,6 +345,9 @@ struct dmub_srv {
uint64_t fb_base;
uint64_t fb_offset;
uint32_t psp_version;
+
+ /* Feature capabilities reported by fw */
+ struct dmub_feature_caps feature_caps;
};
/**
@@ -590,6 +598,22 @@ enum dmub_status dmub_srv_get_gpint_response(struct dmub_srv *dmub,
*/
void dmub_flush_buffer_mem(const struct dmub_fb *fb);
+/**
+ * dmub_srv_get_fw_boot_status() - Returns the DMUB boot status bits.
+ *
+ * @dmub: the dmub service
+ * @status: out pointer for firmware status
+ *
+ * Return:
+ * DMUB_STATUS_OK - success
+ * DMUB_STATUS_INVALID - unspecified error, unsupported
+ */
+enum dmub_status dmub_srv_get_fw_boot_status(struct dmub_srv *dmub,
+ union dmub_fw_boot_status *status);
+
+enum dmub_status dmub_srv_cmd_with_reply_data(struct dmub_srv *dmub,
+ union dmub_rb_cmd *cmd);
+
#if defined(__cplusplus)
}
#endif