| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | clk: meson: a1: pll: determine maximum register in regmap config | Dmitry Rokosov | 2024-03-29 | 1 | -0/+1 |
| *-. | Merge branches 'clk-versa', 'clk-strdup', 'clk-amlogic', 'clk-allwinner' and ... | Stephen Boyd | 2023-08-30 | 1 | -17/+21 |
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| | | * | clk: meson: a1: move bindings include to main driver | Neil Armstrong | 2023-08-08 | 1 | -0/+2 |
| | | * | clk: meson: migrate a1 clock drivers out of hw_onecell_data to drop NR_CLKS | Neil Armstrong | 2023-08-08 | 1 | -17/+19 |
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| * / | clk: Explicitly include correct DT includes | Rob Herring | 2023-07-19 | 1 | -1/+1 |
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| * | clk: meson: a1: add Amlogic A1 PLL clock controller driver | Dmitry Rokosov | 2023-05-30 | 1 | -0/+356 |
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