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path: root/drivers/gpu/drm/i915/display/intel_ddi.c (follow)
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* Merge tag 'drm-next-2021-08-31-1' of git://anongit.freedesktop.org/drm/drmLinus Torvalds2021-09-011-355/+275
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| * drm/i915/dg1: Adjust the AUDIO power domainAnshuman Gupta2021-08-021-1/+1
| * drm/i915/display: remove CNL ddi buf translation tablesLucas De Marchi2021-07-301-6/+6
| * drm/i915/display: remove explicit CNL handling from intel_ddi.cLucas De Marchi2021-07-301-234/+20
| * drm/i915/dg2: Update modeset sequencesMatt Roper2021-07-291-8/+123
| * drm/i915/dg2: Add vswing programming for SNPS physMatt Roper2021-07-291-3/+20
| * drm/i915/dg2: Add MPLLB programming for HDMIMatt Roper2021-07-291-1/+13
| * drm/i915/display: Disable audio, DRRS and PSR before planesJosé Roberto de Souza2021-07-271-10/+20
| * drm/i915/display/dg1: Correctly map DPLLs during state readoutJosé Roberto de Souza2021-07-011-3/+16
| * drm/i915: s/intel_crtc/crtc/Ville Syrjälä2021-06-241-3/+3
| * drm/i915: Introduce encoder->get_buf_trans()Ville Syrjälä2021-06-231-50/+11
| * drm/i915; Return the whole buf_trans struct from get_buf_trans()Ville Syrjälä2021-06-231-38/+38
| * drm/i915: Wrap the platform specific buf trans structs into a unionVille Syrjälä2021-06-231-38/+38
| * drm/i915: Introduce hsw_get_buf_trans()Ville Syrjälä2021-06-231-18/+9
| * drm/i915: s/intel/hsw/ for hsw/bdw/skl buf transVille Syrjälä2021-06-231-21/+18
| * drm/i915: Force a TypeC PHY disconnect during suspend/shutdownImre Deak2021-06-161-2/+32
| * Revert "drm/i915/display: Drop FIXME about turn off infoframes"José Roberto de Souza2021-06-111-0/+1
* | drm/i915/edp: fix eDP MSO pipe sanity checks for ADL-PJani Nikula2021-08-181-12/+12
* | drm/i915/display/dg1: Correctly map DPLLs during state readoutJosé Roberto de Souza2021-07-061-3/+16
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* drm/i915/display: Drop FIXME about turn off infoframesJosé Roberto de Souza2021-06-071-1/+0
* drm/i915/ddi: Flush encoder power domain ref puts during driver unloadImre Deak2021-06-031-0/+2
* drm/i915/adl_p: enable MSO on pipe BJani Nikula2021-05-261-2/+5
* drm/i915/adl_p: Program DP/HDMI link rate to DDI_BUF_CTLImre Deak2021-05-201-3/+33
* drm/i915/adl_p: Define and use ADL-P specific DP translation tablesMika Kahola2021-05-201-1/+6
* drm/i915/adl_p: Implement TC sequencesJosé Roberto de Souza2021-05-201-0/+6
* drm/i915/adl_p: Enable/disable loadgen sharingMika Kahola2021-05-151-0/+8
* drm/i915/xelpd: Handle new location of outputs D and EMatt Roper2021-05-151-10/+30
* drm/i915/display: Fill PSR state during hardware configuration read outJosé Roberto de Souza2021-05-111-0/+2
* drm/i915: Don't include intel_de.h from intel_display_types.hVille Syrjälä2021-05-051-0/+1
* drm/i915/display: move crtc and dpll declarations where they belongJani Nikula2021-04-281-0/+1
* drm/i915: Add enabledisable()Ville Syrjälä2021-04-211-2/+2
* drm/i915/display: rename display version macrosLucas De Marchi2021-04-141-12/+12
* drm/i915: Remove a few redundant glk checksVille Syrjälä2021-04-141-1/+1
* drm/i915: Don't use {skl, cnl}_hpd_pin() for bxt/glkVille Syrjälä2021-04-141-2/+2
* drm/i915/display: Eliminate IS_GEN9_{BC,LP}Matt Roper2021-04-141-17/+20
* drm/i915/display: Eliminate most usage of INTEL_GEN()Matt Roper2021-03-241-52/+52
* drm/i915: Split intel_ddi_encoder_reset() from intel_dp_encoder_reset()Ville Syrjälä2021-03-191-1/+10
* drm/i915/bios: add intel_bios_encoder_data to encoder, use for iboostJani Nikula2021-03-181-4/+5
* drm/i915/bios: start using intel_bios_encoder_data for Type-C USB and TBTJani Nikula2021-03-181-2/+2
* drm/i915/bios: start using the intel_bios_encoder_data directlyJani Nikula2021-03-181-3/+12
* drm/i915: Tolerate bogus DPLL selectionVille Syrjälä2021-03-111-4/+13
* drm/i915: Extend icl_sanitize_encoder_pll_mapping() to all DDI platformsVille Syrjälä2021-03-081-1/+1
* drm/i915: Add encoder->is_clock_enabled()Ville Syrjälä2021-03-081-2/+121
* drm/i915: Move DDI clock readout to encoder->get_config()Ville Syrjälä2021-03-081-23/+298
* drm/i915: Move pipe enable/disable tracepoints to intel_crtc_vblank_{on,off}()Ville Syrjälä2021-03-051-2/+0
* drm/i915/edp: enable eDP MSO during link trainingJani Nikula2021-03-041-0/+37
* drm/i915/mso: add splitter state readout for platforms that support itJani Nikula2021-03-041-0/+41
* drm/i915: s/dev_priv/i915/ for the remainder of DDI clock routingVille Syrjälä2021-02-161-19/+19
* drm/i915: Relocate icl_sanitize_encoder_pll_mapping()Ville Syrjälä2021-02-161-56/+56
* drm/i915: Use .disable_clock() for pll sanitationVille Syrjälä2021-02-161-90/+2
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