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path: root/drivers/gpu/drm/i915/display/intel_display_power.c (follow)
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* Merge tag 'drm-next-2021-08-31-1' of git://anongit.freedesktop.org/drm/drmLinus Torvalds2021-09-011-313/+255
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| * drm/i915/dg1: Adjust the AUDIO power domainAnshuman Gupta2021-08-021-14/+217
| * drm/i915/display: remove explicit CNL handling from intel_display_power.cLucas De Marchi2021-07-301-289/+0
| * drm/i915/dg2: Wait for SNPS PHY calibration during display initMatt Roper2021-07-291-0/+5
| * drm/i915/dg2: Don't program BW_BUDDY registersMatt Roper2021-07-221-0/+4
| * drm/i915/dg2: Don't wait for AUX power well enable ACKsMatt Roper2021-07-221-0/+16
| * drm/i915: Make display workaround upper bounds exclusiveMatt Roper2021-07-211-4/+4
| * drm/i915/rkl: Wa_1409767108 also applies to RKLMatt Roper2021-07-211-1/+2
| * Merge branch 'topic/revid_steppings' into drm-intel-nextMatt Roper2021-07-151-1/+1
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| | * drm/i915/dg1: Use revid->stepping tablesMatt Roper2021-07-151-1/+1
| * | drm/i915/display/xelpd: Extend Wa_14011508470José Roberto de Souza2021-07-131-2/+2
| * | drm/i915: Limit Wa_22010178259 to affected platformsJosé Roberto de Souza2021-07-131-4/+5
| * | drm/i915/xelpd: Pipe A DMC pluggingAnusha Srivatsa2021-06-221-2/+3
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* / drm/i915: Tweaked Wa_14010685332 for all PCHsAnshuman Gupta2021-08-181-8/+8
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* drm/i915/display: remove duplicated argumentWan Jiabing2021-06-071-1/+0
* drm/i915/adlp: Fix AUX power well -> PHY mappingImre Deak2021-06-031-16/+18
* drm/i915: Fix incorrect assert about pending power domain async-put workImre Deak2021-06-031-0/+6
* drm/i915/dmc: Add intel_dmc_has_payload() helperAnusha Srivatsa2021-06-031-8/+8
* drm/i915/adlp: Add missing TBT AUX -> PW#2 power domain dependenciesImre Deak2021-05-271-0/+4
* drm/i915/adl_p: Handle TC coldJosé Roberto de Souza2021-05-251-4/+2
* drm/i915/adl_p: Don't config MBUS and DBUF during display initializationJosé Roberto de Souza2021-05-201-0/+6
* drm/i915/dmc: s/intel_csr.c/intel_dmc.c and s/intel_csr.h/intel_dmc.hAnusha Srivatsa2021-05-201-1/+1
* drm/i915/dmc: Rename functions names having "csr"Anusha Srivatsa2021-05-201-7/+7
* drm/i915/dmc: Rename macro names containing csrAnusha Srivatsa2021-05-201-7/+7
* drm/i915/dmc: s/intel_csr/intel_dmcAnusha Srivatsa2021-05-201-26/+26
* drm/i915/xelpd: Add Wa_14011503030Matt Roper2021-05-131-0/+4
* drm/i915/xelpd: Add XE_LPD power wellsMatt Roper2021-05-131-1/+423
* drm/i915: Don't include intel_de.h from intel_display_types.hVille Syrjälä2021-05-051-0/+1
* drm/i915: Add enabledisable()Ville Syrjälä2021-04-211-1/+1
* drm/i915: Polish for_each_dbuf_slice()Ville Syrjälä2021-04-211-7/+6
* drm/i915: Use intel_de_rmw() for DBUF_POWER_REQUESTVille Syrjälä2021-04-211-7/+2
* drm/i915: Store dbuf slice mask in device infoVille Syrjälä2021-04-211-2/+2
* drm/i915: Collect dbuf device info into a sub-structVille Syrjälä2021-04-211-2/+2
* Merge tag 'topic/intel-gen-to-ver-2021-04-19' of git://anongit.freedesktop.or...Rodrigo Vivi2021-04-191-13/+13
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| * drm/i915/display: rename display version macrosLucas De Marchi2021-04-141-13/+13
| * drm/i915/display: Eliminate IS_GEN9_{BC,LP}Matt Roper2021-04-141-20/+23
* | drm/i915: skip display initialization when there is no displayJosé Roberto de Souza2021-04-091-0/+36
* | drm/i915: Do not set any power wells when there is no displayJosé Roberto de Souza2021-04-091-1/+4
* | drm/i915/display: Eliminate IS_GEN9_{BC,LP}Matt Roper2021-04-081-20/+23
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* drm/i915: rename DISP_STEPPING->DISPLAY_STEP and GT_STEPPING->GT_STEPJani Nikula2021-03-291-1/+1
* drm/i915/display: Simplify GLK display version testsMatt Roper2021-03-241-1/+1
* drm/i915/display: Eliminate most usage of INTEL_GEN()Matt Roper2021-03-241-26/+26
* drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain namesImre Deak2021-02-241-114/+98
* drm/i915/display: Add DDR5 and LPDDR5 BW buddy page entriesJosé Roberto de Souza2021-02-101-0/+8
* Merge tag 'topic/adl-s-enabling-2021-02-01-1' of git://anongit.freedesktop.or...Jani Nikula2021-02-021-5/+6
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| * drm/i915/adl_s: Add display WAs for ADL-SAditya Swarup2021-02-011-3/+4
| * drm/i915/adl_s: Add power wellsLucas De Marchi2021-02-011-1/+1
| * drm/i915/tgl: Use TGL stepping info for applying WAsAditya Swarup2021-01-201-1/+1
* | drm/i915/pps: rename intel_power_sequencer_reset to intel_pps_reset_allJani Nikula2021-01-141-2/+2
* | drm/i915/pps: abstract panel power sequencer from intel_dp.cJani Nikula2021-01-141-1/+1
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