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path: root/drivers/gpu/drm/i915/display/skl_watermark.c (follow)
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* drm/i915/wm: split out SKL+ watermark regs to a separate fileJani Nikula2023-04-041-0/+1
* drm/i915/psr: Implement Display WA #1136Jouni Högander2023-03-311-5/+0
* drm/i915/psr: Implement Wa_14015648006Jouni Högander2023-03-311-2/+5
* drm/i915: Add i915.enable_sagv modparamVille Syrjälä2023-03-241-0/+4
* drm/i915: Reject wm levels that exceed vblank timeVille Syrjälä2023-03-101-2/+116
* drm/i915: Extract skl_wm_latency()Ville Syrjälä2023-03-101-14/+26
* drm/i915: remove unnecessary intel_pm.h includesJani Nikula2023-03-061-1/+0
* drm/i915: Copy highest enabled wm level to disabled wm levels for gen >= 9Stanislav Lisovskiy2023-02-161-11/+15
* drm/i915/wm: add .get_hw_state to watermark funcsJani Nikula2023-02-151-2/+9
* drm/i915/wm: move remaining watermark code out of intel_pm.cJani Nikula2023-02-151-5/+6
* drm/i915: Replace wm.max_levels with wm.num_levels and use it everywhereVille Syrjälä2023-02-101-32/+30
* drm/i915: Populate wm.max_level for everyoneVille Syrjälä2023-02-101-0/+5
* drm/i915: Expose SAGV state via debugfsVille Syrjälä2023-02-011-5/+26
* drm/i915: Introduce HAS_SAGV()Ville Syrjälä2023-02-011-3/+3
* drm/i915: Don't do the WM0->WM1 copy w/a if WM1 is already enabledVille Syrjälä2023-02-011-1/+2
* drm/i915: implement async_flip mode per plane trackingAndrzej Hajda2023-01-301-0/+4
* drm/i915/wm: switch to intel_de_* register accessors in display codeJani Nikula2022-12-081-24/+18
* drm/i915: Use intel_crtc_needs_modeset() moreVille Syrjälä2022-11-031-1/+1
* drm/i915: Simplify modifier lookup in watermark codeVille Syrjälä2022-10-031-19/+3
* drm/i915: Fix watermark calculations for DG2 CCS+CC modifierVille Syrjälä2022-10-031-2/+4
* drm/i915: Fix watermark calculations for DG2 CCS modifiersVille Syrjälä2022-10-031-2/+6
* drm/i915: Fix watermark calculations for gen12+ CCS+CC modifierVille Syrjälä2022-10-031-2/+4
* drm/i915: Fix watermark calculations for gen12+ MC CCS modifierVille Syrjälä2022-10-031-2/+4
* drm/i915: Fix watermark calculations for gen12+ RC CCS modifierVille Syrjälä2022-10-031-2/+4
* drm/i915: Add some debug prints for intel_modeset_all_pipes()Ville Syrjälä2022-09-301-1/+1
* drm/i915/mtl: Update MBUS_DBOX creditsRadhakrishna Sripada2022-09-141-6/+42
* drm/i915/ipc: use intel_uncore_rmw() to enable/disableJani Nikula2022-09-131-10/+2
* drm/i915/display: move IPC under display wm sub-structJani Nikula2022-09-131-3/+3
* drm/i915/ipc: register debugfs only if IPC availableJani Nikula2022-09-131-3/+3
* drm/i915/ipc: move IPC debugfs to skl_watermark.cJani Nikula2022-09-131-0/+61
* drm/i915/ipc: refactor and rename IPC functionsJani Nikula2022-09-131-11/+14
* drm/i915/mtl: Obtain SAGV values from MMIO instead of GT pcode mailboxRadhakrishna Sripada2022-09-131-1/+7
* drm/i915: Use REG_FIELD_GET() to extract skl+ wm latenciesVille Syrjälä2022-09-091-14/+8
* drm/i915: Extract skl_watermark.cVille Syrjälä2022-09-091-0/+3470
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