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path: root/drivers/gpu/drm/i915/display (follow)
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* drm/i915: Remove set but not used variable 'src_y'YueHaibing2019-07-191-2/+1
* drm/i915/vbt: Fix VBT parsing for the PSR sectionDhinakaran Pandiyan2019-07-182-4/+4
* drm/i915: Make sure cdclk is high enough for DP audio on VLV/CHVVille Syrjälä2019-07-181-0/+11
* drm/i915/ehl: Use an id of 4 while accessing DPLL4's CR0 and CR1Vivek Kasireddy2019-07-181-4/+14
* drm/i915: Enable hotplug retryJosé Roberto de Souza2019-07-153-1/+55
* drm/i915: Add support for retrying hotplugImre Deak2019-07-155-28/+68
* drm/i915/ehl: Map MCC pins based on PHY, not portMatt Roper2019-07-151-5/+6
* drm/i915/gt: Use intel_gt as the primary object for handling resetsChris Wilson2019-07-121-9/+13
* drm/i915: Add modular FIAAnusha Srivatsa2019-07-122-8/+45
* drm/i915/display: Drop kerneldoc for 'intel_atomic_commit'Chris Wilson2019-07-121-12/+0
* drm/i915: Skip SINK_COUNT read on CH7511Ville Syrjälä2019-07-121-5/+9
* drm/i915: Propagate "_remove" function name suffix downJanusz Krzysztofik2019-07-125-8/+8
* drm/i915: Replace "_load" with "_probe" consequentlyJanusz Krzysztofik2019-07-121-1/+1
* drm/i915/tgl: Update DPLL clock reference registerJosé Roberto de Souza2019-07-121-2/+6
* drm/i915/tgl: Add DPLL registersLucas De Marchi2019-07-121-5/+19
* drm/i915/tgl: Add vbt value mapping for DDC Bus pinMahesh Kumar2019-07-122-1/+19
* drm/i915/tgl: port to ddc pin mappingLucas De Marchi2019-07-121-27/+9
* drm/i915/tgl: Add gmbus gpio pin to port mappingMahesh Kumar2019-07-122-2/+20
* drm/i915/gen12: MBUS B credit changeRodrigo Vivi2019-07-121-2/+8
* drm/i915/tgl: apply Display WA #1178 to fix type C donglesLucas De Marchi2019-07-121-3/+9
* drm/i915/tgl: init ddi port A-C for Tiger LakeMahesh Kumar2019-07-121-2/+7
* drm/i915/tgl: Add additional PHYs for Tiger LakeLucas De Marchi2019-07-122-1/+7
* drm/i915/tgl: Add additional ports for Tiger LakeVandita Kulkarni2019-07-123-0/+23
* drm/i915/tgl: Add pll managerVandita Kulkarni2019-07-121-1/+18
* drm/i915/tgl: Add new pll idsVandita Kulkarni2019-07-121-5/+18
* drm/i915/tgl: Add power well to support 4th pipeMika Kahola2019-07-122-3/+28
* drm/i915/tgl: Add power well supportImre Deak2019-07-122-15/+485
* drm/i915/tgl: rename TRANSCODER_EDP_VDSC to use on transcoder AJosé Roberto de Souza2019-07-123-8/+15
* drm/i915: Add 4th pipe and transcoderLucas De Marchi2019-07-122-1/+6
* drm/i915: Don't overestimate 4:2:0 link symbol clockVille Syrjälä2019-07-111-1/+3
* drm/i915: Don't pass stack garbage to pcode in the second data registerVille Syrjälä2019-07-111-1/+1
* drm/i915: Use intel_ types in intel_atomic_commit()Ville Syrjälä2019-07-111-39/+37
* drm/i915: Use intel_ types in intel_{lock,modeset}_all_pipes()Ville Syrjälä2019-07-111-17/+21
* drm/i915: Polish intel_atomic_track_fbs()Ville Syrjälä2019-07-111-8/+9
* drm/i915: Polish intel_shared_dpll_swap_state()Ville Syrjälä2019-07-113-15/+9
* drm/i915: Simplify modeset_get_crtc_power_domains() argumentsVille Syrjälä2019-07-111-11/+10
* drm/i915: Use the "display core" power domain in vlv/chv set_cdclk()Ville Syrjälä2019-07-111-6/+6
* drm/i915/sdvo: Fix handling if zero hbuf sizeVille Syrjälä2019-07-111-13/+19
* drm/i915/ehl: Enable DDI-DMatt Roper2019-07-111-0/+1
* drm/i915: Transition port type checks to phy checksMatt Roper2019-07-116-55/+55
* drm/i915/gen11: Convert combo PHY logic to use new 'enum phy' namespaceMatt Roper2019-07-117-175/+176
* drm/i915/gen11: Program ICL_DPCLKA_CFGCR0 according to PHYMatt Roper2019-07-113-39/+59
* drm/i915/gen11: Start distinguishing 'phy' from 'port'Matt Roper2019-07-112-1/+47
* drm/i915: move intel_ddi_set_fia_lane_count to intel_tc.cLucas De Marchi2019-07-103-42/+42
* drm/i915: fix include order in intel_tc.*Lucas De Marchi2019-07-102-2/+3
* drm/i915: make new intel_tc.c use uncore accessorsLucas De Marchi2019-07-101-26/+31
* Merge drm/drm-next into drm-intel-next-queuedRodrigo Vivi2019-07-105-14/+20
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| * Merge tag 'drm-intel-next-2019-06-19' of git://anongit.freedesktop.org/drm/dr...Dave Airlie2019-06-215-14/+20
* | drm/i915/icl: Fixed Input CSC Co-efficients for BT601/709Uma Shankar2019-07-101-12/+12
* | drm/i915/icl: Fix Y pre-offset for Full Range YCbCrUma Shankar2019-07-101-2/+5
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