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path: root/drivers/gpu/drm/i915 (follow)
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* drm/i915: Configure GAM_ECOCHK appropriatly for Gen7Ville Syrjälä2013-04-182-2/+14
* drm/i915: Set GAC_ECO_BITS register on Gen7+Ville Syrjälä2013-04-181-0/+5
* drm/i915: Add ECOBITS_SNB_BITVille Syrjälä2013-04-182-1/+3
* drm/i915: Don't default to overclock maxBen Widawsky2013-04-181-2/+1
* drm/i915: Better overclock supportBen Widawsky2013-04-184-6/+16
* drm/i915: use lower aux clock divider on non-ULT HSWJani Nikula2013-04-181-2/+6
* drm/i915: Allow PPGTT enable to failBen Widawsky2013-04-184-6/+15
* drm/i915: NULL aliasing_ppgtt on cleanupBen Widawsky2013-04-181-0/+1
* drm/i915: Abstract PPGTT enablingBen Widawsky2013-04-184-61/+61
* drm/i915: Rework PPGTT init codeBen Widawsky2013-04-181-1/+5
* drm/i915: Conditionally carve out GGTT PDEBen Widawsky2013-04-181-3/+6
* drm/i915/ppgtt: Set scratch page "globally"Ben Widawsky2013-04-181-2/+1
* drm/i915: random checkpatch fixesBen Widawsky2013-04-181-3/+2
* drm/i915: Map registers before GTT initBen Widawsky2013-04-181-24/+23
* drm/i915: Call out GEN6 PTE specificityBen Widawsky2013-04-181-16/+15
* drm/i915: generalize pte vs. register BAR allocationBen Widawsky2013-04-181-2/+4
* drm/i915: Use MLC (l3$) for context objectsChris Wilson2013-04-181-0/+7
* drm/i915: update FDI mPHY setup codeDaniel Vetter2013-04-181-7/+0
* drm/i915: Workaround incoherence between fences and LLC across multiple CPUsChris Wilson2013-04-181-5/+23
* drm/i915: tune down Y tiling scanout warningDaniel Vetter2013-04-181-2/+4
* drm/i915: set CB tuning also for the reduce clockDaniel Vetter2013-04-181-2/+7
* drm/i915: fix FP CB tuning limits for lvdsDaniel Vetter2013-04-181-1/+1
* drm/i915: fix lost FP_CB_TUNE setting for pch pllsDaniel Vetter2013-04-181-3/+3
* drm/i915: Fix SDVO connector and encoder get_hw_state functionsEgbert Eich2013-04-181-6/+3
* drm/i915: Add a pipeless ivybridge configurationBen Widawsky2013-04-081-0/+17
* drm/i915: Set PCH_NOPBen Widawsky2013-04-081-0/+9
* drm/i915: Don't wait for PCH on resetBen Widawsky2013-04-082-0/+9
* drm/i915: Don't touch South Display when PCH_NOPBen Widawsky2013-04-084-9/+29
* drm/i915: PCH_NOPBen Widawsky2013-04-061-0/+2
* drm/i915: Support PCH no displayBen Widawsky2013-04-063-6/+20
* drm/i915: info level for simulated gpu hang dmesg noticeDaniel Vetter2013-04-061-1/+1
* drm/i915: revert eDP bpp clamping code changesDaniel Vetter2013-04-051-4/+14
* Revert "drm/i915: fix DP get_hw_state return value"Daniel Vetter2013-04-051-1/+1
* drm/i915: Don't use the HDMI port color range bit on ValleyviewVille Syrjälä2013-04-051-1/+1
* drm/i915: Set PIPECONF color range bit on ValleyviewVille Syrjälä2013-04-051-0/+7
* drm/i915: extract i9xx_set_pipeconfDaniel Vetter2013-04-051-55/+65
* drm/i915: Add no-lvds quirk for Fujitsu Esprimo Q900Christian Lamparter2013-04-051-0/+8
* drm/i915: create pipe_config->dpll for clock stateDaniel Vetter2013-04-032-72/+95
* drm/i915: hw readout support for ->has_pch_encodersDaniel Vetter2013-04-031-9/+25
* drm/i915: add hw state readout/checking for pipe_configDaniel Vetter2013-04-032-10/+72
* drm/i915: rip out superflous is_dp&is_cpu_edp trackingDaniel Vetter2013-04-031-30/+7
* drm/i915: remove leaky eDP functionsDaniel Vetter2013-04-032-26/+0
* drm/i915: track dp target_clock in pipe_configDaniel Vetter2013-04-033-23/+10
* drm/i915: move dp_m_n computation to dp_encoder->compute_configDaniel Vetter2013-04-033-67/+28
* drm/i915: clear up the fdi/dp set_m_n confusionDaniel Vetter2013-04-033-57/+64
* Merge tag 'v3.9-rc5' into drm-intel-next-queuedDaniel Vetter2013-04-039-20/+50
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| * Revert "drm/i915: write backlight harder"Daniel Vetter2013-03-241-8/+5
| * drm/i915: don't disable the power well yetPaulo Zanoni2013-03-243-0/+9
| * Revert "drm/i915: set TRANSCODER_EDP even earlier"Daniel Vetter2013-03-241-5/+5
| * drm/i915: stop using GMBUS IRQs on Gen4 chipsJiri Kosina2013-03-201-1/+10
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