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path: root/drivers/gpu/drm/msm/dsi/phy (follow)
Commit message (Expand)AuthorAgeFilesLines
* drm: msm: Use DRM_DEV_* instead of dev_*Mamta Shukla2018-12-116-23/+23
* drm/msm/dsi: implement auto PHY timing calculator for 10nm PHYAbhinav Kumar2018-04-193-28/+111
* drm/msm/dsi: Populate the 10nm PHY funcsArchit Taneja2018-02-201-0/+199
* drm/msm/dsi: Add skeleton 10nm PHY/PLL codeArchit Taneja2018-02-203-0/+57
* drm/msm/dsi: check for failure on retrieving pll in dsi managerLloyd Atkinson2018-02-201-3/+3
* drm/msm/dsi: convert to msm_clk_get()Rob Clark2017-10-281-1/+1
* drm/msm/dsi: Set up runtime PM for DSIArchit Taneja2017-08-021-1/+1
* drm/msm/dsi: Add PHY/PLL for 8x96Archit Taneja2017-02-063-0/+175
* drm/msm/dsi: Add new method to calculate 14nm PHY timingsHai Li2017-02-062-1/+127
* drm/msm/dsi: Move PHY operations out of hostHai Li2017-02-065-19/+36
* drm/msm/dsi: Pass down use case to PHYHai Li2017-02-062-1/+29
* drm/msm/dsi: Return more timings from PHY to hostHai Li2017-02-062-15/+16
* drm/msm/dsi: Add a PHY op that initializes version specific stuffArchit Taneja2017-02-065-9/+30
* drm/msm/dsi: Don't get DSI index from DTArchit Taneja2016-07-165-5/+39
* drm/msm/dsi: Fix regulator API abuseArchit Taneja2016-05-084-18/+5
* drm/msm/dsi: Add support for 28nm PHY on 8960Archit Taneja2015-12-143-0/+200
* drm/msm/dsi: Updata LNn_CFG4 register settings for 28nm PHYHai Li2015-10-221-4/+2
* drm: msm: dsi: Don't attempt changing voltage of switchesBjorn Andersson2015-10-221-1/+1
* drm/msm/dsi: Make each PHY type compilation independentHai Li2015-08-161-0/+4
* drm/msm/dsi: Split PHY drivers to separate filesHai Li2015-08-164-0/+853