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* module: Convert default symbol namespace to string literalMasahiro Yamada2024-12-031-1/+1
| | | | | | | | | | | | | Commit cdd30ebb1b9f ("module: Convert symbol namespace to string literal") only converted MODULE_IMPORT_NS() and EXPORT_SYMBOL_NS(), leaving DEFAULT_SYMBOL_NAMESPACE as a macro expansion. This commit converts DEFAULT_SYMBOL_NAMESPACE in the same way to avoid annoyance for the default namespace as well. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* i2c: designware: determine HS tHIGH and tLOW based on HW parametersMichael Wu2024-11-241-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit 35eba185fd1a ("i2c: designware: Calculate SCL timing parameter for High Speed Mode") the SCL high period count and low period count for high speed mode are calculated based on fixed tHIGH = 160 and tLOW = 120. However, the set of two fixed values is only applicable to the combination of hardware parameters IC_CAP_LOADING is 400 and IC_CLK_FREQ_OPTIMIZATION is true. Outside of this combination, the SCL frequency may not reach 3.4 MHz because the fixed tHIGH and tLOW are not small enough. If IC_CAP_LOADING is 400, it means the bus capacitance is 400pF; Otherwise, 100 pF. If IC_CLK_FREQ_OPTIMIZATION is true, it means that the hardware reduces its internal clock frequency by reducing the internal latency required to generate the high period and low period of the SCL line. Section 3.15.4.5 in DesignWare DW_apb_i2b Databook v2.03 says that when IC_CLK_FREQ_OPTIMIZATION = 0, MIN_SCL_HIGHtime = 60 ns for 3.4 Mbps, bus loading = 100pF = 120 ns for 3.4 Mbps, bus loading = 400pF MIN_SCL_LOWtime = 160 ns for 3.4 Mbps, bus loading = 100pF = 320 ns for 3.4 Mbps, bus loading = 400pF and section 3.15.4.6 says that when IC_CLK_FREQ_OPTIMIZATION = 1, MIN_SCL_HIGHtime = 60 ns for 3.4 Mbps, bus loading = 100pF = 160 ns for 3.4 Mbps, bus loading = 400pF MIN_SCL_LOWtime = 120 ns for 3.4 Mbps, bus loading = 100pF = 320 ns for 3.4 Mbps, bus loading = 400pF In order to calculate more accurate SCL high period count and low period count for high speed mode, two hardware parameters IC_CAP_LOADING and IC_CLK_FREQ_OPTIMIZATION must be considered together. Since there're no registers controlliing these these two hardware parameters, users can declare them in the device tree so that the driver can obtain them. Signed-off-by: Michael Wu <michael.wu@kneron.us> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
* i2c: designware: constify abort_sourcesRaag Jadav2024-11-171-1/+1
| | | | | | | | We never modify abort_sources, mark it as const. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
* i2c: designware: Fix spelling and other issues in the commentsAndy Shevchenko2024-11-131-3/+5
| | | | | | | | | | Fix spelling and other issues, such as kernel-doc reported about, in the comments. While at it, fix some indentation issues as well. Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
* i2c: designware: Remove 'cond' from i2c_dw_scl_hcnt()Andy Shevchenko2024-11-131-37/+15
| | | | | | | | | The 'cond' parameter is not being used (always default, hence drop it and hence make it consistent with i2c_dw_scl_lcnt(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
* i2c: designware: Get rid of redundant 'else'Andy Shevchenko2024-11-131-3/+3
| | | | | | | | | | | | | | | | | | In the snippets like the following if (...) return / goto / break / continue ...; else ... the 'else' is redundant. Get rid of it. Reviewed-by: Andi Shyti <andi.shyti@kernel.org> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Serge Semin <fancer.lancer@gmail.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
* i2c: designware: do not hold SCL low when I2C_DYNAMIC_TAR_UPDATE is not setLiu Peibao2024-11-081-2/+4
| | | | | | | | | | | | | | | | | | | | When the Tx FIFO is empty and the last command has no STOP bit set, the master holds SCL low. If I2C_DYNAMIC_TAR_UPDATE is not set, BIT(13) MST_ON_HOLD of IC_RAW_INTR_STAT is not enabled, causing the __i2c_dw_disable() timeout. This is quite similar to commit 2409205acd3c ("i2c: designware: fix __i2c_dw_disable() in case master is holding SCL low"). Also check BIT(7) MST_HOLD_TX_FIFO_EMPTY in IC_STATUS, which is available when IC_STAT_FOR_CLK_STRETCH is set. Fixes: 2409205acd3c ("i2c: designware: fix __i2c_dw_disable() in case master is holding SCL low") Co-developed-by: Xiaowu Ding <xiaowu.ding@jaguarmicro.com> Signed-off-by: Xiaowu Ding <xiaowu.ding@jaguarmicro.com> Co-developed-by: Angus Chen <angus.chen@jaguarmicro.com> Signed-off-by: Angus Chen <angus.chen@jaguarmicro.com> Signed-off-by: Liu Peibao <loven.liu@jaguarmicro.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
* i2c: designware: fix controller is holding SCL low while ENABLE bit is disabledKimriver Liu2024-09-241-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | It was observed that issuing the ABORT bit (IC_ENABLE[1]) will not work when IC_ENABLE is already disabled. Check if the ENABLE bit (IC_ENABLE[0]) is disabled when the controller is holding SCL low. If the ENABLE bit is disabled, the software needs to enable it before trying to issue the ABORT bit. otherwise, the controller ignores any write to ABORT bit. These kernel logs show up whenever an I2C transaction is attempted after this failure. i2c_designware e95e0000.i2c: timeout waiting for bus ready i2c_designware e95e0000.i2c: timeout in disabling adapter The patch fixes the issue where the controller cannot be disabled while SCL is held low if the ENABLE bit is already disabled. Fixes: 2409205acd3c ("i2c: designware: fix __i2c_dw_disable() in case master is holding SCL low") Signed-off-by: Kimriver Liu <kimriver.liu@siengine.com> Cc: <stable@vger.kernel.org> # v6.6+ Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andy@kernel.org> Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
* i2c: designware: Propagate firmware nodeAndy Shevchenko2024-09-111-0/+2
| | | | | | | | | | Propagate firmware node by using a specific API call, i.e. device_set_node(). Reviewed-by: Andi Shyti <andi.shyti@kernel.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Serge Semin <fancer.lancer@gmail.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
* i2c: designware: Uninline i2c_dw_probe()Andy Shevchenko2024-09-111-0/+14
| | | | | | | | | | | Since i2c_dw_probe() is going to be extended, uninline it to reduce the noise in the common header. Reviewed-by: Andi Shyti <andi.shyti@kernel.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Serge Semin <fancer.lancer@gmail.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
* i2c: designware: Consolidate PM opsAndy Shevchenko2024-09-101-0/+62
| | | | | | | | | | | | | | | | | | | | We have the same (*) PM ops in the PCI and platform drivers. Instead, consolidate that PM ops under exported variable and deduplicate them. *) With the subtle ACPI and P-Unit behaviour differences in PCI case. But this is not a problem as for ACPI we need to take care of the P-Unit semaphore anyway and calling PM ops for PCI makes sense as it might provide specific operation regions in ACPI (however there are no known devices on market that are using it with PCI enabled I2C). Note, the clocks are not in use in the PCI case. Reviewed-by: Andi Shyti <andi.shyti@kernel.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Sanket Goswami <Sanket.Goswami@amd.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
* i2c: designware: Remove ->disable() callbackAndy Shevchenko2024-09-101-0/+1
| | | | | | | | | | | | | Commit 90312351fd1e ("i2c: designware: MASTER mode as separated driver") introduced ->disable() callback but there is no real use for it. Both i2c-designware-master.c and i2c-designware-slave.c set it to the same i2c_dw_disable() and scope is inside the same kernel module. That said, replace the callback by explicitly calling the i2c_dw_disable(). Reviewed-by: Andi Shyti <andi.shyti@kernel.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
* i2c: designware: Move exports to I2C_DW namespacesAndy Shevchenko2024-09-101-0/+2
| | | | | | | | | Reduce scope of the I²C DesignWare driver exports to I2C_DW namespaces. This will prevent abuse of the symbols and clean up global namespace. Reviewed-by: Andi Shyti <andi.shyti@kernel.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
* i2c: designware: Unify the firmware type checksAndy Shevchenko2024-09-101-2/+4
| | | | | | | | | | Instead of asymmetrical checks for the firmware type use the is_*_node() calls. Reviewed-by: Andi Shyti <andi.shyti@kernel.org> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
* i2c: designware: Consolidate firmware parsing and configuring codeAndy Shevchenko2024-09-101-6/+62
| | | | | | | | | | | | We have the same code flows in the PCI and platform drivers. Moreover, the flow requires the common code to export a few functions. Instead, consolidate that flow under new function called i2c_dw_fw_parse_and_configure() and drop unneeded exports. Reviewed-by: Andi Shyti <andi.shyti@kernel.org> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
* i2c: designware: Drop return value from i2c_dw_acpi_configure()Andy Shevchenko2024-09-101-3/+1
| | | | | | | | | | i2c_dw_acpi_configure() is called without checking of the returned value, hence just drop it by converting to void. Reviewed-by: Andi Shyti <andi.shyti@kernel.org> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
* i2c: designware: Fix wrong setting for {ss,fs,hs}_{h,l}cnt registersAdrian Huang2024-09-101-2/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When disabling CONFIG_X86_AMD_PLATFORM_DEVICE option, the driver 'drivers/acpi/acpi_apd.c' won't be compiled. This leads to a situation where BMC (Baseboard Management Controller) cannot retrieve the memory temperature via the i2c interface after i2c DW driver is loaded. Note that BMC can retrieve the memory temperature before booting into OS. [Debugging Detail] 1. dev->pclk and dev->clk are NULL when calling devm_clk_get_optional() in dw_i2c_plat_probe(). 2. The callings of i2c_dw_scl_hcnt() in i2c_dw_set_timings_master() return 65528 (-8 in integer format) or 65533 (-3 in integer format). The following log shows SS's HCNT/LCNT: i2c_designware AMDI0010:01: Standard Mode HCNT:LCNT = 65533:65535 3. The callings of i2c_dw_scl_lcnt() in i2c_dw_set_timings_master() return 65535 (-1 in integer format). The following log shows SS's HCNT/LCNT: i2c_designware AMDI0010:01: Fast Mode HCNT:LCNT = 65533:65535 4. i2c_dw_init_master() configures the register IC_SS_SCL_HCNT with the value 65533. However, the DW i2c databook mentioned the value cannot be higher than 65525. Quote from the DW i2c databook: NOTE: This register must not be programmed to a value higher than 65525, because DW_apb_i2c uses a 16-bit counter to flag an I2C bus idle condition when this counter reaches a value of IC_SS_SCL_HCNT + 10. 5. Since ss_hcnt, ss_lcnt, fs_hcnt, and fs_lcnt are the invalid values, we should not write the corresponding registers. Fix the issue by reading dev->{ss,fs,hs}_hcnt and dev->{ss,fs,hs}_lcnt from HW registers if ic_clk is not set. Reported-by: Dong Wang <wangdong28@lenovo.com> Suggested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Adrian Huang <ahuang12@lenovo.com> Tested-by: Dong Wang <wangdong28@lenovo.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/linux-i2c/8295cbe1-a7c5-4a35-a189-5d0bff51ede6@linux.intel.com/
* i2c: designware: Use accessors to DW_IC_INTR_MASK registerJarkko Nikula2024-02-271-1/+1
| | | | | | | | | | | Convert access to DW_IC_INTR_MASK register using the existing __i2c_dw_write_intr_mask() and a __i2c_dw_read_intr_mask() introduced here. Motivation to this is to prepare for generic polling mode code where polling mode will use a SW mask instead of DW_IC_INTR_MASK. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Jiawen Wu <jiawenwu@trustnetic.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
* i2c: designware: Fix corrupted memory seen in the ISRJan Bottorff2023-11-131-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When running on a many core ARM64 server, errors were happening in the ISR that looked like corrupted memory. These corruptions would fix themselves if small delays were inserted in the ISR. Errors reported by the driver included "i2c_designware APMC0D0F:00: i2c_dw_xfer_msg: invalid target address" and "i2c_designware APMC0D0F:00:controller timed out" during in-band IPMI SSIF stress tests. The problem was determined to be memory writes in the driver were not becoming visible to all cores when execution rapidly shifted between cores, like when a register write immediately triggers an ISR. Processors with weak memory ordering, like ARM64, make no guarantees about the order normal memory writes become globally visible, unless barrier instructions are used to control ordering. To solve this, regmap accessor functions configured by this driver were changed to use non-relaxed forms of the low-level register access functions, which include a barrier on platforms that require it. This assures memory writes before a controller register access are visible to all cores. The community concluded defaulting to correct operation outweighed defaulting to the small performance gains from using relaxed access functions. Being a low speed device added weight to this choice of default register access behavior. Signed-off-by: Jan Bottorff <janb@os.amperecomputing.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Serge Semin <fancer.lancer@gmail.com> Reviewed-by: Serge Semin <fancer.lancer@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
* i2c: designware: fix __i2c_dw_disable() in case master is holding SCL lowYann Sionneau2023-09-191-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The DesignWare IP can be synthesized with the IC_EMPTYFIFO_HOLD_MASTER_EN parameter. In this case, when the TX FIFO gets empty and the last command didn't have the STOP bit (IC_DATA_CMD[9]), the controller will hold SCL low until a new command is pushed into the TX FIFO or the transfer is aborted. When the controller is holding SCL low, it cannot be disabled. The transfer must first be aborted. Also, the bus recovery won't work because SCL is held low by the master. Check if the master is holding SCL low in __i2c_dw_disable() before trying to disable the controller. If SCL is held low, an abort is initiated. When the abort is done, then proceed with disabling the controller. This whole situation can happen for instance during SMBus read data block if the slave just responds with "byte count == 0". This puts the driver in an unrecoverable state, because the controller is holding SCL low and the current __i2c_dw_disable() procedure is not working. In this situation only a SoC reset can fix the i2c bus. Co-developed-by: Jonathan Borne <jborne@kalray.eu> Signed-off-by: Jonathan Borne <jborne@kalray.eu> Signed-off-by: Yann Sionneau <ysionneau@kalray.eu> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
* i2c: designware: Add driver support for Wangxun 10Gb NICJiawen Wu2023-06-051-0/+8
| | | | | | | | | | | | | | | | | | | Wangxun 10Gb ethernet chip is connected to Designware I2C, to communicate with SFP. Introduce the property "wx,i2c-snps-model" to match device data for Wangxun in software node case. Since IO resource was mapped on the ethernet driver, add a model quirk to get regmap from parent device. The exists IP limitations are dealt as workarounds: - IP does not support interrupt mode, it works on polling mode. - Additionally set FIFO depth address the chip issue. Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com> Reviewed-by: Piotr Raczynski <piotr.raczynski@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
* Merge tag 'i2c-for-6.3-rc1' of ↵Linus Torvalds2023-02-251-6/+7
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux Pull i2c updates from Wolfram Sang: - new drivers for HPE GXP and Loongson 2K/LS7A - bigger refactorings for i801 and xiic - gpio driver gained ACPI and SDA-write only support - the core converted some OF helpers to fwnode helpers - usual bunch of driver updates * tag 'i2c-for-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (52 commits) MAINTAINERS: Add HPE GXP I2C Support i2c: Add GXP SoC I2C Controller dt-bindings: i2c: Add hpe,gxp-i2c i2c: xiic: Remove some dead code i2c: xiic: Add SCL frequency configuration support i2c: xiic: Update compatible with new IP version dt-bindings: i2c: xiic: Add 'xlnx,axi-iic-2.1' to compatible i2c: i801: Call i801_check_post() from i801_access() i2c: i801: Call i801_check_pre() from i801_access() i2c: i801: Centralize configuring block commands in i801_block_transaction i2c: i801: Centralize configuring non-block commands in i801_simple_transaction i2c: i801: Handle SMBAUXCTL_E32B in i801_block_transaction_by_block only i2c: i801: Add i801_simple_transaction(), complementing i801_block_transaction() Documentation: i2c: correct spelling dt-bindings: i2c: i2c-st: convert to DT schema i2c: i801: add helper i801_set_hstadd() i2c: i801: make FEATURE_BLOCK_PROC dependent on FEATURE_BLOCK_BUFFER i2c: i801: make FEATURE_HOST_NOTIFY dependent on FEATURE_IRQ i2c: i801: improve interrupt handler i2c: st: use pm_sleep_ptr to avoid ifdef CONFIG_PM_SLEEP ...
| * i2c: designware: Change from u32 to unsigned int for regmap_read() callsShyam Sundar S K2023-01-281-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | regmap_read() API signature expects the caller to send "unsigned int" type to return back the read value, but there are some occurrences of 'u32' across i2c-designware-* files. Change them to match the regmap_read() signature. Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
| * i2c: designware: fix i2c_dw_clk_rate() return size to be u32Hanna Hawa2023-01-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | Make i2c_dw_clk_rate() to return u32 instead of unsigned long, as the function return the value of get_clk_rate_khz() which returns u32. Fixes: b33af11de236 ("i2c: designware: Do not require clock when SSCN and FFCN are provided") Signed-off-by: Hanna Hawa <hhhawa@amazon.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
* | i2c: designware: use casting of u64 in clock multiplication to avoid overflowLareine Khawaly2023-01-091-3/+6
|/ | | | | | | | | | | | | | | | | In functions i2c_dw_scl_lcnt() and i2c_dw_scl_hcnt() may have overflow by depending on the values of the given parameters including the ic_clk. For example in our use case where ic_clk is larger than one million, multiplication of ic_clk * 4700 will result in 32 bit overflow. Add cast of u64 to the calculation to avoid multiplication overflow, and use the corresponding define for divide. Fixes: 2373f6b9744d ("i2c-designware: split of i2c-designware.c into core and bus specific parts") Signed-off-by: Lareine Khawaly <lareine@amazon.com> Signed-off-by: Hanna Hawa <hhhawa@amazon.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
* i2c: designware: Remove common i2c_dw_disable_int()Jarkko Nikula2022-11-121-5/+0
| | | | | | | | | | | | | | | Commit 90312351fd1e ("i2c: designware: MASTER mode as separated driver") introduced disable_int pointer but there is no real use for it. Both i2c-designware-master.c and i2c-designware-slave.c set it to the same i2c_dw_disable_int() and scope is inside the same kernel module. Since i2c_dw_disable_int() is just masking interrupts and the direct DW_IC_INTR_MASK register write looks more clear in the code use that and remove it from common code. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
* i2c: designware: Use standard optional ref clock implementationSerge Semin2022-06-131-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | Even though the DW I2C controller reference clock source is requested by the method devm_clk_get() with non-optional clock requirement the way the clock handler is used afterwards has a pure optional clock semantic (though in some circumstances we can get a warning about the clock missing printed in the system console). There is no point in reimplementing that functionality seeing the kernel clock framework already supports the optional interface from scratch. Thus let's convert the platform driver to using it. Note by providing this commit we get to fix two problems. The first one was introduced in commit c62ebb3d5f0d ("i2c: designware: Add support for an interface clock"). It causes not having the interface clock (pclk) enabled/disabled in case if the reference clock isn't provided. The second problem was first introduced in commit b33af11de236 ("i2c: designware: Do not require clock when SSCN and FFCN are provided"). Since that modification the deferred probe procedure has been unsupported in case if the interface clock isn't ready. Fixes: c62ebb3d5f0d ("i2c: designware: Add support for an interface clock") Fixes: b33af11de236 ("i2c: designware: Do not require clock when SSCN and FFCN are provided") Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
* i2c: designware: Sort timing parameter ACPI method calls by the speedJarkko Nikula2022-05-141-1/+1
| | | | | | | | | | | | | | It's more logical to read these get timing parameters ACPI method calls sorted by speed categories in increasing order: Standard-mode, Fast-mode, Fast-mode Plus and High-speed mode. Originally these were in order after commit a92ec1746f10 ("i2c: designware: get fast plus and high speed *CNT configuration") but got mixed up over the years. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
* i2c: designware: Add missing locksJan Dabros2022-02-111-0/+12
| | | | | | | | | | | | | All accesses to controller's registers should be protected on probe, disable and xfer paths. This is needed for i2c bus controllers that are shared with but not controller by kernel. Signed-off-by: Jan Dabros <jsd@semihalf.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
* i2c: designware: Use DIV_ROUND_CLOSEST() macroAndy Shevchenko2021-08-111-4/+4
| | | | | | | | | | Instead of open-coding DIV_ROUND_CLOSEST() and similar use the macros directly. While at it, replace numbers with predefined SI metric prefixes. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
* i2c: designware: Add driver support for AMD NAVI GPUSanket Goswami2021-04-051-0/+3
| | | | | | | | | | | | | | | | | | | | | | | The Latest AMD NAVI GPU card has an integrated Type-C controller and Designware I2C with PCI Interface. The PD controller for USB Type-C can be accessed over I2C. The client driver is part of the USB Type-C UCSI driver. Also, there exists a couple of notable IP limitations that are dealt as workarounds: - I2C transaction work on a polling mode as IP does not generate interrupt. - I2C read command sent twice to address the IP issues. - AMD NAVI GPU based products are already in the commercial market, hence some of the I2C parameters are statically programmed as they can not be part of the ACPI table. Reviewed-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Co-developed-by: Nehal Bakulchandra Shah <Nehal-Bakulchandra.shah@amd.com> Signed-off-by: Nehal Bakulchandra Shah <Nehal-Bakulchandra.shah@amd.com> Signed-off-by: Sanket Goswami <Sanket.Goswami@amd.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
* i2c: designware: Adjust bus speed independently of ACPIAndy Shevchenko2020-06-231-8/+17
| | | | | | | | | | | | | | | | | | | | | | John Stultz reported that commit f9288fcc5c615 ("i2c: designware: Move ACPI parts into common module") caused a regression on the HiKey board where adv7511 HDMI bridge driver wasn't probing anymore due the I2C bus failed to start. It seems the change caused the bus speed being zero when CONFIG_ACPI not set and neither speed based on "clock-frequency" device property or default fast mode is set. Fix this by splitting i2c_dw_acpi_adjust_bus_speed() to i2c_dw_acpi_round_bus_speed() and i2c_dw_adjust_bus_speed(), where the latter one has the code that runs independently of ACPI. Fixes: f9288fcc5c615 ("i2c: designware: Move ACPI parts into common module") Reported-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Wolfram Sang <wsa@kernel.org>
* i2c: designware: Convert driver to using regmap APISerge Semin2020-05-301-51/+126
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Seeing the DW I2C driver is using flags-based accessors with two conditional clauses it would be better to replace them with the regmap API IO methods and to initialize the regmap object with read/write callbacks specific to the controller registers map implementation. This will be also handy for the drivers with non-standard registers mapping (like an embedded into the Baikal-T1 System Controller DW I2C block, which glue-driver is a part of this series). As before the driver tries to detect the mapping setup at probe stage and creates a regmap object accordingly, which will be used by the rest of the code to correctly access the controller registers. In two places it was appropriate to convert the hand-written read-modify-write and read-poll-loop design patterns to the corresponding regmap API ready-to-use methods. Note the regmap IO methods return value is checked only at the probe stage. The rest of the code won't do this because basically we have MMIO-based regmap so non of the read/write methods can fail (this also won't be needed for the Baikal-T1-specific I2C controller). Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> [wsa: fix type of 'rx_valid' and remove outdated kdoc var description] Signed-off-by: Wolfram Sang <wsa@kernel.org>
* i2c: designware: Drop hard coded FIFO depth assignmentAndy Shevchenko2020-05-221-3/+0
| | | | | | | | | | | | | | | It's not clear why the commit fe20ff5c7e9c ("i2c-designware: Add support for Designware core behind PCI devices.") followed by commit b61b14154b19 ("i2c-designware: add support for Intel Lynxpoint") chose to hard code FIFO depth size. The FIFO depth on all hardware, I have tested on, can be nicely detected automatically. Thus, we may safely drop hard coded FIFO sizes from the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
* i2c: designware: Move ACPI parts into common moduleAndy Shevchenko2020-05-221-4/+131
| | | | | | | | For possible code reuse in the future, move ACPI parts into common module. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
* i2c: designware: Drop unneeded condition in i2c_dw_validate_speed()Andy Shevchenko2020-05-221-8/+6
| | | | | | | | | | We may bailout directly from the loop instead of breaking it and testing a loop counter. This also gives advantages such as decreased indentation level along with dropped unneeded condition. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
* i2c: designware: Move i2c_dw_validate_speed() helper to a common codeAndy Shevchenko2020-05-221-0/+24
| | | | | | | | | | | | In order to export array supported speed for wider use, move it to a header along with i2c_dw_validate_speed() helper moved to a common code. No functional changes intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
* i2c: designware: Fix spelling typos in the commentsAndy Shevchenko2020-03-211-4/+4
| | | | | | | | Fix spelling typos in the comments with help of `codespell`. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: designware: Discard i2c_dw_read_comp_param() functionSerge Semin2020-03-211-6/+0
| | | | | | | | | | There is no code left in the kernel which would be using the function. So just remove it. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Signed-off-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: designware: Detect the FIFO size in the common codeSerge Semin2020-03-211-0/+22
| | | | | | | | | | | | | | | | | | | | | The problem with detecting the FIFO depth in the platform driver is that in order to implement this we have to access the controller IC_COMP_PARAM_1 register. Currently it's done before the i2c_dw_set_reg_access() method execution, which is errors prone since the method determines the registers endianness and access mode and we can't use dw_readl/dw_writel accessors before this information is retrieved. We also can't move the i2c_dw_set_reg_access() function invocation to after the master/slave probe functions call (when endianness and access mode are determined), since the FIFO depth information is used by them for initializations. So in order to fix the problem we have no choice but to move the FIFO size detection methods to the common code and call it at the probe stage. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Signed-off-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: designware: Add support for an interface clockPhil Edworthy2019-03-201-2/+16
| | | | | | | | | | | | | | The Synopsys I2C Controller has an interface clock, but most SoCs hide this away. However, on some SoCs you need to explicitly enable the interface clock in order to access the registers. Therefore, add support for an optional interface clock. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by: Gareth Williams <gareth.williams.jx@renesas.com> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* Merge tag 'acpi-4.20-rc1-2' of ↵Linus Torvalds2018-10-301-2/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull more ACPI updates from Rafael Wysocki: "Rework the handling of the P-unit semaphore on Intel Baytrail and Cherrytrail systems to avoid race conditions and excessive overhead related to it (Hans de Goede)" * tag 'acpi-4.20-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: ACPI / PMIC: xpower: Add depends on IOSF_MBI to Kconfig entry i2c: designware: Cleanup bus lock handling ACPI / PMIC: xpower: Block P-Unit I2C access during read-modify-write x86: baytrail/cherrytrail: Rework and move P-Unit PMIC bus semaphore code
| * i2c: designware: Cleanup bus lock handlingHans de Goede2018-10-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | Now that most of the special Bay- / Cherry-Trail bus lock handling has been moved to the iosf_mbi code we can simplify the remaining code a bit. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* | i2c: designware: allow IP specific sda_hold_timeAlexandre Belloni2018-09-021-0/+2
|/ | | | | | | | | | | | Because some old designware IPs were not supporting setting an SDA hold time, vendors developed their own solution. Add a way for the final driver to provide its own SDA hold time handling. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: designware: Add SPDX license tagAndy Shevchenko2018-08-201-14/+1
| | | | | | | | | | | | | | Replace short statement in comment with proper SPDX license tag. Note, for i2c-desingware-slave.c the identifier is chosen in accordance with MODULE_LICENSE() macro since it is visible to user. Another point to this choice is that the header seems to be copy'n'paste from the other file of this very driver. Acked-by: Luis Oliveira <Luis.Oliveira@synopsys.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: designware: Add debug print for SDA hold time valueJarkko Nikula2018-07-031-0/+4
| | | | | | | | | | SDA hold time is an important timing parameter and often reason for arbitration lost errors if not set to a correct value. Add a debug print for it in order to see what value gets programmed to a HW. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: designware: Move SDA hold time configuration to common codeJarkko Nikula2018-07-031-0/+37
| | | | | | | | | | | | | | | SDA hold time configuration is common to both master and slave code. It is also something that can be done once during probe and do only register write when HW needs to be reinitialized. Remove duplication and move SDA hold time configuration to common code. It will be called from slave probe and for master code from a new i2c_dw_set_timings_master() to where we will populate more probe time timing parameter setting. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: designware: Don't use internal ___constant_swab32Jarkko Nikula2018-07-031-1/+2
| | | | | | | | | | | It looks ___constant_swab32 is an internal byte swap detail. Switch to swap32() and include header file for it explicitly. Now it comes implicitly via linux/i2c.h include. Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: designware: Move register access detection to common codeJarkko Nikula2018-07-031-0/+34
| | | | | | | | | | | | | | Move register access detection out from master and slave HW initialization code to common code. Motivation for this is to have register access configured before HW initialization and remove duplicated code. This allows to do further separation between probe time initialization and runtime reinitialization code. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: designware: refactor low-level enable/disableAlexander Monakov2018-05-151-11/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Low-level controller enable function __i2c_dw_enable is overloaded to also handle disabling. What's worse, even though the documentation requires polling the IC_ENABLE_STATUS register when disabling, this is not done: polling needs to be requested specifically by calling __i2c_dw_enable_and_wait, which can also poll on enabling, but that doesn't work if the IC_ENABLE_STATUS register is not implemented. This is quite confusing if not in fact backwards. Especially since the documentation says that disabling should be followed by polling, the driver should be using a separate function where it does one-shot disables to make the optimization stand out. This refactors the two functions so that requested status is given in the name rather than in a boolean argument. Specifically: - __i2c_dw_enable: enable without polling (in accordance with docs) - __i2c_dw_disable: disable and do poll (also as suggested by docs) - __i2c_dw_disable_nowait: disable without polling (Linux-specific) No functional change. Signed-off-by: Alexander Monakov <amonakov@ispras.ru> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> [wsa: fixed blank lines in header file] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-19 19:55:30 +0100