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path: root/drivers/gpu/drm/i915/display/intel_display.c (follow)
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* drm/i915: pass dev_priv explicitly to TRANS_MULTJani Nikula2024-06-071-2/+2
* drm/i915: pass dev_priv explicitly to PIPESRCJani Nikula2024-06-071-3/+3
* drm/i915: pass dev_priv explicitly to TRANS_VSYNCSHIFTJani Nikula2024-06-071-1/+2
* drm/i915: pass dev_priv explicitly to BCLRPATJani Nikula2024-06-071-1/+1
* drm/i915: pass dev_priv explicitly to TRANS_VSYNCJani Nikula2024-06-071-3/+3
* drm/i915: pass dev_priv explicitly to TRANS_VBLANKJani Nikula2024-06-071-4/+5
* drm/i915: pass dev_priv explicitly to TRANS_VTOTALJani Nikula2024-06-071-5/+5
* drm/i915: pass dev_priv explicitly to TRANS_HSYNCJani Nikula2024-06-071-3/+3
* drm/i915: pass dev_priv explicitly to TRANS_HBLANKJani Nikula2024-06-071-3/+4
* drm/i915: pass dev_priv explicitly to TRANS_HTOTALJani Nikula2024-06-071-3/+3
* drm/i915: pass dev_priv explicitly to DPLLJani Nikula2024-06-071-10/+11
* drm/i915: Plumb the full atomic state into icl_check_nv12_planes()Ville Syrjälä2024-05-311-5/+6
* drm/i915/display: Add compare config for MTL+ platformsMika Kahola2024-05-301-0/+33
* drm/i915: Bury c8_planes_changed() in intel_color_check()Ville Syrjälä2024-05-271-18/+0
* drm/i915: Hide the intel_crtc_needs_color_update() inside intel_color_check()Ville Syrjälä2024-05-271-5/+3
* drm/i915: Plumb the entire atomic state into intel_color_check()Ville Syrjälä2024-05-271-1/+1
* drm/i915: pass dev_priv explicitly to DSPCNTRJani Nikula2024-05-241-3/+3
* drm/i915: Extract i9xx_plane_regs.hVille Syrjälä2024-05-221-0/+1
* drm/i915: Add skl+ plane name aliases to enum plane_idVille Syrjälä2024-05-221-4/+4
* drm/i915: pass dev_priv explicitly to CURCNTRJani Nikula2024-05-161-2/+2
* drm/i915: Extract intel_cursor_regs.hVille Syrjälä2024-05-151-0/+1
* drm/i915: Extract skl_universal_plane_regs.hVille Syrjälä2024-05-151-0/+1
* drm/i915/psr: Rename has_psr2 as has_sel_updateJouni Högander2024-05-151-1/+1
* drm/i915/display: perform transient flushMatthew Auld2024-05-031-0/+3
* drm/i915/bmg: Extend DG2 tc check to futureRadhakrishna Sripada2024-05-031-4/+3
* drm/i915: s/need_async_flip_disable_wa/need_async_flip_toggle_wa/Ville Syrjälä2024-05-031-1/+1
* drm/i915: Allow the initial async flip to change modifierVille Syrjälä2024-05-031-0/+7
* drm/i915/dpio: Extract vlv_dpio_phy_regs.hVille Syrjälä2024-04-301-0/+1
* drm/{i915, xe}: Implement fbdev emulation as in-kernel clientThomas Zimmermann2024-04-251-1/+0
* drm/i915/dsi: pass display to register macros instead of implicit variableJani Nikula2024-04-231-4/+4
* drm/i915: Carve up struct intel_dpll_hw_stateVille Syrjälä2024-04-171-2/+2
* drm/i915: Drop pointless 'crtc' argument from *_crtc_clock_get()Ville Syrjälä2024-04-171-3/+3
* drm/i915: Extract i9xx_dpll_get_hw_state()Ville Syrjälä2024-04-171-20/+4
* drm/i915: Handle joined pipes inside hsw_crtc_enable()Stanislav Lisovskiy2024-04-111-79/+91
* drm/i915: Handle joined pipes inside hsw_crtc_disable()Ville Syrjälä2024-04-111-25/+39
* drm/i915/mtl: Add DP FEC BS jitter WAImre Deak2024-04-101-0/+3
* drm/i915/mtl+: Disable DP/DSC SF insertion at EOL WAImre Deak2024-04-101-0/+9
* drm/i915/adlp+: Add DSC early pixel count scaling WA (Wa_1409098942)Imre Deak2024-04-101-0/+13
* drm/i915: Introduce intel_crtc_joined_pipe_mask()Ville Syrjälä2024-04-091-0/+7
* drm/i915: move max_dotclk_freq to display substructJani Nikula2024-04-091-3/+3
* drm/i915: Update pipes in reverse order for bigjoinerVille Syrjälä2024-04-081-3/+11
* drm/i915: Fix intel_modeset_pipe_config_late() for bigjoinerVille Syrjälä2024-04-081-14/+32
* drm/i915/psr: Panel replay has to be enabled before link trainingJouni Högander2024-04-081-0/+12
* drm/i915: Implement vblank synchronized MBUS join changesStanislav Lisovskiy2024-04-041-1/+4
* drm/i915/display: Compute vrr_vsync paramsMitul Golani2024-04-041-0/+2
* drm/i915/display: Add state checker for Adaptive Sync SDPMitul Golani2024-04-041-0/+46
* drm/i915: Extract glk_need_scaler_clock_gating_wa()Ville Syrjälä2024-04-031-6/+10
* drm/i915: Clean up glk_pipe_scaler_clock_gating_wa()Ville Syrjälä2024-04-031-12/+7
* drm/i915/psr: Move writing early transport pipe srcJouni Högander2024-03-281-9/+0
* drm/i915/de: register wait function renamesJani Nikula2024-03-261-2/+1
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